频谱自适应通信波形FPGA实现关键技术研究
发布时间：2018-09-05 13:45
【摘要】：随着科技的迅猛发展和人们对无线通信的极大需求,无线通信技术取得了突飞猛进的发展。相比飞速发展的陆地通信,航空通信的发展还处于比较落后的状态,亟需提高航空通信的速率、可靠性和抗干扰能力。本文基于非连续正交频分复用(Non-Contiguous Orthogonal Frequency Division Multiplexing,NC-OFDM)技术,利用频谱感知结果,在FPGA(Field Programmable Gate Array)中实现频谱自适应的通信波形生成和接收的关键技术。论文第一章简要介绍了本文的研究意义和多载波技术,在介绍OFDM(Orthogonal Frequency Division Multiplexing)技术的基础上,分析了将NC-OFDM应用于频谱自适应系统的可能性。论文第二章对链路模型和系统开发平台进行简要介绍,首先从功能和原理两方面对链路中的各个模块进行了描述。接下来介绍了开发平台中的基带板和射频板。基带板中包含2个TI 2C6670 DSP(Digital Signal Processor)和2两块Xilinx FPGA,其中DSP主要完成编译码、交织和加扰,FPGA则实现收发机的数字基带的信号处理。射频板将基带数据加载到高频载波上,同时对收发信号进行滤波处理。论文第三章对频谱自适应多载波波形的收发关键技术进行了分析,详细描述了这些技术的FPGA实现。在波形发送关键技术实现部分,主要描述数据映射、CCSK(Cyclic Code Shift Keying)调制、导引符号生成、OFDM调制、同步序列生成、带外抑制和组帧、PAPR(Peak to Average Power Ratio)抑制的FPGA实现;在波形接收关键技术实现部分,描述了同步、解帧和干扰抑制、OFDM解调、信道估计、16QAM(Quadrature Amptitude Modulation)软解调和CCSK硬解调的FPGA实现。论文第四章介绍平台开发中使用的SRIO(Serial Rapid Input/Output)和CPRI(Common Public Radio Interface)接口协议,同时给出SRIO接口和CPRI接口的实现方式。SRIO接口的实现采用了Xilinx的rio_wrapper解决方案,通过实现SRIO逻辑层的SWRITE和DOORBELL两种数据传输模式,实现SRIO接口的数据传输。CPRI接口实现则采用CPRI核,根据链路速率和接口速率,采用向下兼容映射方式把要发送的基带I/Q(In-phase/Quadranture)数据映射到CPRI接口的基本帧中,同时把接收基本帧中的数据反映射为基带数据,实现基带板与射频板的通信。第五章对关键模块FPGA实现和整体链路进行性能测试。首先对频偏估计模块进行了性能测试,测试数据表明:频偏估计模块在系统工作点能够非常精确的估计出频偏值,满足大频偏的巡航场景下的频偏估计要求。通过PAPR模块的测试,表明PAPR抑制模块能够有效的抑制发送信号PAPR值,能够满足系统PAPR要求。进一步,利用信道仿真器模拟高斯信道和巡航信道,测试两种信道下的性能;同时测试了添加20%的部分带干扰下的链路性能。通过与仿真结果比较,验证实现的正确性。最后联合DSP实现的turbo编译码进行全链路的测试,结果表明系统具有良好的传输性能,且满足满足航空通信的需求。第六章为全文总结,并提出了工作展望与方向。
[Abstract]:With the rapid development of science and technology and people's great demand for wireless communication, wireless communication technology has made rapid development. Compared with the rapid development of land communication, the development of aviation communication is still relatively backward. It is urgent to improve the rate, reliability and anti-jamming ability of aviation communication. Based on discontinuous orthogonal Frequency Division Multiplexing (Non-Contiguous Orthogonal Frequency Division Multiplexing,NC-OFDM) and using spectrum sensing results, this paper presents the key techniques for generating and receiving spectrum adaptive communication waveforms in FPGA (Field Programmable Gate Array). In the first chapter, the significance of this paper and the multicarrier technology are briefly introduced. On the basis of the introduction of OFDM (Orthogonal Frequency Division Multiplexing) technology, the possibility of applying NC-OFDM to the spectrum adaptive system is analyzed. In the second chapter, the link model and the system development platform are briefly introduced. Firstly, each module in the link is described from the aspects of function and principle. Then the base band board and radio frequency board in the development platform are introduced. The baseband board consists of two TI 2C6670 DSP (Digital Signal Processor) and two Xilinx FPGA, in which the DSP is mainly used to code and decode, and the interleaved and scrambled FPGA is used to process the digital baseband signal of the transceiver. The RF board loads the baseband data onto the high frequency carrier and filters the transceiver signal. In the third chapter, the key technologies of spectrum adaptive multicarrier waveform are analyzed, and the FPGA implementation of these technologies is described in detail. In the key technology of waveform transmission, we mainly describe the FPGA implementation of data mapping CCSK (Cyclic Code Shift Keying) modulation, pilot symbol generation, synchronization sequence generation, out-of-band suppression and framing PAPR (Peak to Average Power Ratio) suppression. In the key technology of waveform receiving, the FPGA implementation of synchronization, unframing and interference suppression (Quadrature Amptitude Modulation) demodulation, channel estimation 16QAM (Quadrature Amptitude Modulation) soft demodulation and CCSK hard demodulation are described. Chapter 4 introduces the SRIO (Serial Rapid Input/Output) and CPRI (Common Public Radio Interface) interface protocol used in the platform development. At the same time, the realization of SRIO interface and CPRI interface is implemented with the rio_wrapper solution of Xilinx. Through the realization of SWRITE and DOORBELL data transmission mode in SRIO logic layer, the data transmission. CPRI interface of SRIO interface is realized by CPRI core, according to link rate and interface rate. The baseband I / Q (In-phase/Quadranture) data to be transmitted is mapped to the basic frame of the CPRI interface by the way of downward compatible mapping. At the same time, the data in the received basic frame is reflected as baseband data, and the communication between the baseband board and the RF board is realized. In the fifth chapter, we test the performance of the key module FPGA and the whole link. First, the performance of the frequency offset estimation module is tested. The test data show that the frequency offset estimation module can estimate the frequency offset very accurately at the operating point of the system, which can meet the requirements of frequency offset estimation in the cruising scene with large frequency offset. The test of the PAPR module shows that the PAPR suppression module can effectively suppress the PAPR value of the transmitted signal and meet the requirements of the system PAPR. Furthermore, the channel simulator is used to simulate Gao Si channel and cruise channel to test the performance of the two channels, and the link performance with 20% partial interference is tested. The correctness of the implementation is verified by comparing with the simulation results. Finally, the turbo code and decode implemented by DSP is used to test the whole link. The results show that the system has good transmission performance and meets the requirements of aviation communication. The sixth chapter is the summary of the full text, and puts forward the work prospect and direction.
【学位授予单位】：电子科技大学
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：TN929.53;TN791
本文编号：2224451
[Abstract]:With the rapid development of science and technology and people's great demand for wireless communication, wireless communication technology has made rapid development. Compared with the rapid development of land communication, the development of aviation communication is still relatively backward. It is urgent to improve the rate, reliability and anti-jamming ability of aviation communication. Based on discontinuous orthogonal Frequency Division Multiplexing (Non-Contiguous Orthogonal Frequency Division Multiplexing,NC-OFDM) and using spectrum sensing results, this paper presents the key techniques for generating and receiving spectrum adaptive communication waveforms in FPGA (Field Programmable Gate Array). In the first chapter, the significance of this paper and the multicarrier technology are briefly introduced. On the basis of the introduction of OFDM (Orthogonal Frequency Division Multiplexing) technology, the possibility of applying NC-OFDM to the spectrum adaptive system is analyzed. In the second chapter, the link model and the system development platform are briefly introduced. Firstly, each module in the link is described from the aspects of function and principle. Then the base band board and radio frequency board in the development platform are introduced. The baseband board consists of two TI 2C6670 DSP (Digital Signal Processor) and two Xilinx FPGA, in which the DSP is mainly used to code and decode, and the interleaved and scrambled FPGA is used to process the digital baseband signal of the transceiver. The RF board loads the baseband data onto the high frequency carrier and filters the transceiver signal. In the third chapter, the key technologies of spectrum adaptive multicarrier waveform are analyzed, and the FPGA implementation of these technologies is described in detail. In the key technology of waveform transmission, we mainly describe the FPGA implementation of data mapping CCSK (Cyclic Code Shift Keying) modulation, pilot symbol generation, synchronization sequence generation, out-of-band suppression and framing PAPR (Peak to Average Power Ratio) suppression. In the key technology of waveform receiving, the FPGA implementation of synchronization, unframing and interference suppression (Quadrature Amptitude Modulation) demodulation, channel estimation 16QAM (Quadrature Amptitude Modulation) soft demodulation and CCSK hard demodulation are described. Chapter 4 introduces the SRIO (Serial Rapid Input/Output) and CPRI (Common Public Radio Interface) interface protocol used in the platform development. At the same time, the realization of SRIO interface and CPRI interface is implemented with the rio_wrapper solution of Xilinx. Through the realization of SWRITE and DOORBELL data transmission mode in SRIO logic layer, the data transmission. CPRI interface of SRIO interface is realized by CPRI core, according to link rate and interface rate. The baseband I / Q (In-phase/Quadranture) data to be transmitted is mapped to the basic frame of the CPRI interface by the way of downward compatible mapping. At the same time, the data in the received basic frame is reflected as baseband data, and the communication between the baseband board and the RF board is realized. In the fifth chapter, we test the performance of the key module FPGA and the whole link. First, the performance of the frequency offset estimation module is tested. The test data show that the frequency offset estimation module can estimate the frequency offset very accurately at the operating point of the system, which can meet the requirements of frequency offset estimation in the cruising scene with large frequency offset. The test of the PAPR module shows that the PAPR suppression module can effectively suppress the PAPR value of the transmitted signal and meet the requirements of the system PAPR. Furthermore, the channel simulator is used to simulate Gao Si channel and cruise channel to test the performance of the two channels, and the link performance with 20% partial interference is tested. The correctness of the implementation is verified by comparing with the simulation results. Finally, the turbo code and decode implemented by DSP is used to test the whole link. The results show that the system has good transmission performance and meets the requirements of aviation communication. The sixth chapter is the summary of the full text, and puts forward the work prospect and direction.
【学位授予单位】：电子科技大学
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：TN929.53;TN791
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