二维类超结LDMOS新结构研究

发布时间：2019-04-27 19:29

【摘要】：横向双扩散金属氧化物半导体(Lateral Double-diffused MOS FET,LDMOS)器件因其电极均位于器件表面,制造工艺简单等优点在功率集成电路中得到了广泛应用。击穿电压和导通电阻是LDMOS设计中需要重点考虑的关键参数,如何提升两者之间的折衷成为研究的热点。超结思想兼具低导通电阻和高耐压的特点。但是,将超结思想应用到横向功率器件的过程中,存在衬底辅助耗尽效应问题,这大大恶化了器件的性能。且传统三维超结器件制造工艺复杂,成本较高。基于电荷平衡的思想,本文提出两类二维类超结LDMOS新结构,通过二维器件模拟软件ME DICI对新结构的击穿电压和导通电阻与常规结构进行了对比分析研究,同时对新结构中影响其性能的主要参数进行了仿真分析。仿真结果表明新结构较常规结构的击穿电压和导通电阻之间的折衷得到明显的提升。具体研究结果如下:(1)二维类SJ/RESURF LDMOS器件由于衬底辅助耗尽效应在漏端最为严重,新结构在漂移区靠近漏端位置内引入了RESURF区,从漏端对P柱区进行耗尽,提高了器件的击穿电压。仿真结果表明:在相同的超结区掺杂浓度,同样的漂移区长度(25μm)下,新结构的击穿电压为407V,而常规的二维横向超结LDMOS的击穿电压为202V。(2)具有P柱区阶梯掺杂的二维类SJ/RESURF LDMOS器件在器件反向耐压时,纵向电场引起的衬底辅助耗尽使得P柱中会出现多余电荷,且多余电荷的浓度由源到漏逐渐增加。基于此,新结构将超结柱区中的P柱区进行了阶梯掺杂,掺杂浓度从源侧到漏测逐渐降低。一方面,P柱区将电荷掺杂浓度设计成阶梯分布可以利用缓变结产生的新峰值电场来调节器件的表面电场,使漂移区电场均匀分布;另一方面,与以往的N柱区阶梯掺杂相比,新结构采用的P柱区阶梯掺杂可以提高N柱区的掺杂浓度,降低导通状态下的漂移区电阻。仿真结果表明:在相同的掺杂条件和漂移区长度(45μm)下,具有P柱区阶梯掺杂的二维类SJ/R ESURF LDMOS器件的击穿电压达到了743V,而P柱区均匀掺杂的二维类SJ/RESURF LDMOS器件只有5 28V。
[Abstract]:Transverse double-diffused metal oxide semiconductor (Lateral Double-diffused MOS FET,LDMOS) devices have been widely used in power integrated circuits because their electrodes are located on the surface of the devices and the fabrication process is simple. Breakdown voltage and on-resistance are the key parameters to be taken into account in the design of LDMOS. How to improve the compromise between them has become a hot research topic. Superjunction has the characteristics of low on resistance and high voltage resistance. However, in the process of applying superjunction to transverse power devices, there exists the problem of substrate-assisted depletion, which greatly worsens the performance of the devices. Moreover, the manufacturing process of traditional 3D superjunction devices is complex and the cost is high. Based on the idea of charge balance, two kinds of two-dimensional superjunction-like LDMOS structures are proposed in this paper. The breakdown voltage and on-resistance of the new structures are compared with the conventional structures by means of two-dimensional device simulation software ME DICI. At the same time, the main parameters affecting the performance of the new structure are simulated and analyzed. The simulation results show that the tradeoff between the breakdown voltage and on-resistance of the new structure is much higher than that of the conventional structure. The specific results are as follows: (1) the substrate-assisted depletion effect of two-dimensional SJ/RESURF LDMOS-like devices is the most serious at the leakage end. The new structure introduces the RESURF region in the drift region near the leakage end, and exhausts the P-column region from the leakage end. The breakdown voltage of the device is increased. The simulation results show that the breakdown voltage of the new structure is 407V at the same doping concentration in the superjunction region and the same drift region length (25 渭 m). However, the breakdown voltage of the conventional two-dimensional transverse superjunction LDMOS is 202 V. (2) the substrate-assisted depletion caused by the longitudinal electric field causes the supercharge in the P-column when the two-dimensional SJ/RESURF LDMOS-like devices with step doping in the P-column have reverse withstand voltage. The concentration of excess charge increases gradually from source to drain. Based on this, the P-column region in the super-junction column is doped step by step in the new structure, and the doping concentration decreases gradually from the source side to the missing one. On the one hand, the new peak electric field produced by slow-changing junction can be used to adjust the surface electric field of the device by designing the charge doping concentration as ladder distribution in the P-column region, so that the electric field in the drift region can be evenly distributed. On the other hand, compared with the previous step doping in the N-column region, the P-column ladder doping in the new structure can increase the doping concentration in the N-column region and reduce the drift-zone resistance in the on-off state. The simulation results show that under the same doping conditions and drift region length (45 渭 m), the breakdown voltage of two-dimensional SJ/R ESURF LDMOS-like devices with step doping in the P-column region can reach 743V. The two-dimensional SJ/RESURF LDMOS-like devices with uniform doping in the P-column region have only 528V.
【学位授予单位】：南京邮电大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN386

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