5.0Gbps高速串行USB3.0数据发送器的设计

发布时间：2018-01-08 23:07

本文关键词：5.0Gbps高速串行USB3.0数据发送器的设计　出处：《合肥工业大学》2013年硕士论文　论文类型：学位论文

【摘要】：通用串行总线（Universal Serial Bus），即USB，自从出现之日起便广受关注，目前已经成为PC和消费类电子产品必备的串行接口。随着数字多媒体技术的迅速发展，多媒体文件不断增大，，上一代USB接口USB2.0已经不能满足即时同步传输的需要。因此，英特尔等公司于2008年底推出了USB3.0规范协议。USB3.0最高支持5.0Gbps的传输速率，在数年内将能够很好地满足人们对于即时快速传输的需求。发送器电路的性能直接影响了USB3.0接口发送数据的速度和质量，本文即设计一款适用于USB3.0接口的发送器电路。本文首先在详细分析信号完整性的基础上，指出了高频信号传输过程中需要考虑的问题和解决办法。然后根据USB3.0规范协议的要求，提出了发送器电路的设计目标和总体架构，并对发送器电路的具体模块进行了设计和仿真。本文基于半时钟技术设计了一种预加重激励电路，该电路结构简单，降低了系统对时钟频率的要求，从而降低了功耗。本文设计的其他模块包括五分频电路、10bit并转串电路、前驱动电路、CML驱动器电路、带隙基准电路和DAC电流偏置电路等。在所有模块设计、仿真完成后对整体电路在一些极端条件下进行了仿真，仿真结果显示电路性能良好，工作稳定。最后对发送器电路的版图进行了设计，整个版图的面积约为480μm×300μm。
[Abstract]:Universal Serial bus, the Universal Serial bus, has received widespread attention since its inception. At present, it has become a necessary serial interface for PC and consumer electronic products. With the rapid development of digital multimedia technology, the number of multimedia files is increasing. The previous generation of USB interface USB2.0 can no longer meet the needs of real-time synchronous transmission. Intel and others introduced the USB3.0 specification protocol, USB3.0, in end of 2008, which supports a maximum transmission rate of 5.0 Gbps. In a few years, it will be able to meet the needs of people for real-time and fast transmission. The performance of transmitter circuit directly affects the speed and quality of USB3.0 interface data transmission. This paper designs a transmitter circuit suitable for USB3.0 interface. Based on the detailed analysis of signal integrity, this paper points out the problems and solutions to be considered in the process of high frequency signal transmission, and then according to the requirements of USB3.0 specification and protocol. The design goal and overall structure of the transmitter circuit are put forward, and the specific modules of the transmitter circuit are designed and simulated. Based on the half-clock technology, a preemphasis excitation circuit is designed, which is simple in structure. Other modules designed in this paper include five-frequency circuit 10bit parallel string circuit, pre-drive circuit and CML driver circuit. Bandgap reference circuit and DAC current bias circuit etc. After all modules are designed and simulated, the whole circuit is simulated under some extreme conditions. The simulation results show that the circuit has good performance. Finally, the layout of the transmitter circuit is designed, the whole layout area is about 480 渭 m 脳 300 渭 m.
【学位授予单位】：合肥工业大学
【学位级别】：硕士
【学位授予年份】：2013
【分类号】：TN402;TP334.7

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