面向脸部特征检测的嵌入式多核架构研究

发布时间：2018-01-14 17:33

  本文关键词：面向脸部特征检测的嵌入式多核架构研究　出处：《天津大学》2012年硕士论文　论文类型：学位论文

  更多相关文章： 特征检测 并行体系结构 可配置可扩展处理器 软硬件协同设计

【摘要】：作为近年来的热点研究问题,视线估计的重要意义逐渐被越来越多的人们意识到,同时它也是本课题组多年来的主要研究方向。脸部特征提取作为视线估计系统中的重要组成部分是本文将要研究的重点内容。根据课题组对此领域的研究发现,计算效率高并且资源消耗低的嵌入式脸部特征实时检测系统是研究趋势。本文使用软硬件协同设计方法,并且基于传输触发架构可配置可扩展处理器(T*CORE)对此领域的一系列问题展开研究。 本文在处理流程上放弃了原有的利用肤色的检测算法而采用了检测精度更高的基于haar-like特征的人脸检测算法,同时优化YCbCrCg肤色分割模型使得计算量降低到原有的1/3,并且提出改进的积分图和平方积分图的数据存储格式来减少算法计算期间占用大量存储空间的问题,使得数据宽度缩减到17bits和25bits。并且本文提出一个新颖的人脸检测并行策略,即在相同尺寸的图像下连续检测窗口中相同位置的弱分类器同时计算,在提高计算速度的同时又没有增加寄存器资源消耗。 根据对算法的功能划分,本文采用了基于传输触发架构的可配置可扩展处理器架构实现人脸检测功能,针对具体应用设计了10个功能单元和对应的并行程序。而其它模块则分别在ASIC模块和NIOSⅡ上实现,并在此基础上提出基于SOPC平台的多核架构。整个系统的运行频率为100MHz,在检测图像尺寸为640*480的情况下处理速度达到8fps,满足最初的设计需求。
[Abstract]:As a hot research issue in recent years, the importance of line of sight estimation has been gradually recognized by more and more people. At the same time, it is also the main research direction of our group for many years. As an important part of the line of sight estimation system, facial feature extraction is the focus of this paper. Embedded face feature real-time detection system with high computing efficiency and low resource consumption is the research trend. This paper uses hardware and software co-design method. A series of problems in this field are studied based on the configurable extensible processor (TX) based on the transport trigger architecture. In this paper, the original skin color detection algorithm is abandoned in the processing process, and the face detection algorithm based on haar-like features with higher detection accuracy is adopted. At the same time, the YCbCrCg skin segmentation model is optimized to reduce the computational complexity to the original 1/3. An improved data storage format of integral graph and square integral graph is proposed to reduce the large amount of storage space during the computation of the algorithm. The data width is reduced to 17 bits and 25 bits. A novel parallel face detection strategy is proposed in this paper. The weak classifier of the same position in the continuous detection window is calculated simultaneously under the same image size, which not only increases the speed of calculation but also does not increase the consumption of register resources. According to the functional partition of the algorithm, this paper uses a configurable scalable processor architecture based on transmission trigger architecture to implement face detection. Ten functional units and corresponding parallel programs are designed for specific applications, while other modules are implemented on ASIC module and NIOS 鈪，

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