多核片上互连方式研究

发布时间：2018-01-15 19:13

本文关键词：多核片上互连方式研究　出处：《南京大学》2017年硕士论文　论文类型：学位论文

【摘要】：随着集成电路产业的发展,片上多核成为芯片发展的必然趋势。高性能计算芯片也从运算核心型转为互连中心型。当多处理器芯片的集成密度进一步增加,与之相关联的通信要求也越来越高。多核间通信方式的选择成为影响系统性能的重要因素。当前片内互连结构主要包含总线式互连及片上网络互连,其中总线式互连区分为共享式总线和交叉开关式总线。为了得出各种互连方式的适用情况,本文分析不同互连结构的优势和劣势,并且用网络负载仿真对资源使用和性能表现特点进行模型分析。层次化交叉开关结构和片上网络能较好地解决共享总线等早期结构的通信带宽低和扩展性差的问题。当节点数目为中等规模时,层次化交叉开关结构在面积消耗和网络负载方面较优;节点数目为大规模时,片上网络在网络负载能力方面显示了优势。此外数据的交换方式也会极大的影响数据带宽和传输延时。按照是否建立专用路径可以分为包交换方式和电路交换方式两类。为了比较两种交换方式下的网络负载情况,本文采用RTL级设计研究网络性能特点和片上资源开销。当网络所传输的数据包很大时,无论当前数据注入率多大,包交换方式都会产生通道负载不均衡的问题,网络性能下降严重。所以此时电路交换方式表现更优。当数据包尺寸中等时,对于注入率低的情况,电路交换方式的性能表现更优;当注入率升高时,包交换方式能较好解决网络拥堵的问题,从而展现出更好的性能。片上网络包交换方式下的路由算法决定了数据包最终选择哪条路径从源地址传到目的地址。本文的包交换片上网络路由算法评估侧重于分析网络的吞吐率和平均时延。考虑和FFT运算有关的梭型流量模式,适应性的奇偶拐弯路由算法从平均时延和吞吐量上优于静态XY路由算法约15%;而在伪随机流量模式下,奇偶拐弯路由算法对应的拓扑中间热点问题突出,导致性能劣于静态XY算法。
[Abstract]:With the development of the integrated circuit industry, multi-core chip has become the inevitable trend of development. The high performance computing chip from the operation core to interconnect center. When multi processor chip integration density further increased, and the associated communication requirements are increasingly high. Many inter core communication options become an important factor in the performance of the system. The on-chip interconnect structure includes bus interconnection network interconnection and on-chip bus interconnection, which is divided into shared bus and cross switched bus application. In order to draw all kinds of interconnection method, this paper analysis the advantages and disadvantages of different interconnection structure, and network load simulation of the use of resources and the performance characteristics of the model. A hierarchical crossbar structure and network on chip can solve the bandwidth shared communication bus structure and low expansibility early The problem of the poor. When the number of nodes is of medium size, a hierarchical crossbar structure in the area of consumption and the network load is better; the number of nodes is large, the on-chip network load capacity in the network shows the advantage. In addition to exchange data will greatly affect the data bandwidth and transmission delay. According to whether the establishment of the special path can be divided into packet switching and circuit switching mode of two kinds of load. In order to compare two kinds of exchange mode of the network, this paper adopts RTL Design Research on network performance characteristics and on-chip resources. When the network transmission of data packets is very large, regardless of the current injection rate in packet switching mode the channel will have the load balance problem, the decline of the network performance seriously. So the performance of circuit switching is better. When the packet size medium, the injection rate is low, the electric road Exchange performance way better; when the injection rate increased, packet switching can solve network congestion problems, which show better performance. The routing algorithm for network on chip under the packet switching mode determines the packet eventually choose which path from the source address to a destination address. The packet switched on in the analysis of network throughput and average delay evaluation of routing algorithms in network on chip. Considering the operation and FFT shuttle type flow model, adaptive routing algorithm is better than that of the odd even turn from the average delay and throughput of the static routing algorithm of XY is about 15%; and in the pseudo random flow model, topological middle hot issue routing algorithm corresponding to the odd even turn the outstanding result in performance is inferior to the static XY algorithm.

【学位授予单位】：南京大学
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：TP332

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