众核处理器核级冗余拓扑重构算法研究

发布时间：2018-01-20 00:11

本文关键词： 众核处理器拓扑重构行波列借成团效应可靠性　出处：《东华大学》2015年硕士论文　论文类型：学位论文

【摘要】：随着半导体技术进入纳米时代，受功耗、互连线延迟、设计复杂度等因素限制，芯片设计技术已从传统的高复杂度单核处理器模式转向在片上集成众多相对简单内核的模式；处理器设计进入了众核处理器时代。但是，一方面受生产缺陷、工艺偏差的影响，另一方面随着众核处理器芯片上内核数量的不断增加，这都将增加芯片上出现失效核的风险，进而导致芯片成品率降低。因此，如何提高芯片成品率已成为产业界和学术界的热点问题。核级冗余技术是提高众核处理器成品率的一种有效方法。现有的行波列借拓扑重构算法是基于分级优化思想，把整体优化问题分解为以失效核为中心的局部优化问题，然后通过局部搜索失效核重构的最优解来求解整体优化问题的最优解。但是，其在局部邻域进行的是单向搜索，易导致搜索到的解并不是局部最优解，或者前一单元依次占用下一单元最优解而导致连锁列借操作。针对这种情况，本文构造了一种局部邻域双向搜索的优化行波列借算法，，使得局部解更优并避免了连锁操作。实验表明，在失效核数目较多的情况下，本算法所得拓扑结构的性能要明显好于原有行波列借算法所得。为了满足众核系统在安全关键领域的适用需求，本文提出了以可靠性为优化目标的众核处理器核级冗余拓扑重构模拟退火算法。该算法首先针对2D-Mesh拓扑结构的众核处理器进行了可靠性建模；并采用匕首抽样的蒙特卡洛方法进行可靠性仿真计算；最后采用模拟退火优化技术实现该众核处理器核级冗余拓扑重构算法。通过实验对比得出：当2D-Mesh网络中链路可靠性较高时物理拓扑结构对整个众核处理器可靠性的影响不大，因此在计算众核处理器可靠性时只需考虑处理器核节点的故障成团效应对系统可靠性的影响即可。实验还与当前以性能为优化目标的拓扑重构算法进行比较，结果表明在失效核数目较少时，新的算法可以大幅提高众核处理的可靠性。本文对众核处理器核级冗余拓扑重构这一NP-Complete类问题实例进行了近似和启发式方法的求解尝试，获得的研究结果可为以性能和可靠性为优化目标的众核处理器核级冗余拓扑重构方案设计提供借鉴或支持。
[Abstract]:As semiconductor technology enters the nanometer age, it is limited by power consumption, interconnect delay, design complexity and so on. The chip design technology has changed from the traditional single-core processor mode with high complexity to the mode of integrating many relatively simple cores on the chip. Processor design has entered the era of multi-core processor. However, on the one hand, due to production defects, process bias, on the other hand, with the increasing number of cores on the multi-core processor chip. This will increase the risk of failure core on the chip, and then lead to the reduction of the yield of the chip. Therefore, how to improve the yield of the chip has become a hot issue in industry and academia. Nuclear redundancy is an effective method to improve the yield of multi-core processors. Existing traveling wave train topology reconstruction algorithms are based on hierarchical optimization. The global optimization problem is decomposed into a local optimization problem centered on the failure kernel, and then the optimal solution of the global optimization problem is solved by local searching the optimal solution of the failure kernel reconstruction. The local neighborhood is a one-way search, which is easy to lead to the search solution is not the local optimal solution, or the former unit in turn occupy the next unit optimal solution, leading to chain sequence borrowing operation. In this paper, an optimal traveling wave train borrowing algorithm based on local neighborhood bidirectional search is constructed, which makes the local solution better and avoids the linkage operation. The experimental results show that the number of failure cores is large. The performance of the proposed algorithm is better than that of the original traveling wave train algorithm. In order to meet the needs of the multi-nuclear system in the security critical areas. In this paper, a simulated annealing algorithm for core level redundant topology reconstruction of multi-core processors with reliability as the optimization objective is proposed. Firstly, the reliability modeling of the multi-core processors with 2D-Mesh topology is carried out. The Monte Carlo method of dagger sampling is used to simulate the reliability. Finally, simulated annealing optimization technique is used to realize the core level redundant topology reconstruction algorithm of the multi-core processor. When the link reliability is high in 2D-Mesh network, the physical topology has little effect on the reliability of the whole multi-core processor. Therefore, in computing the reliability of multi-core processor, we only need to consider the effect of the cluster effect of the processor core node on the reliability of the system. The experiment is also compared with the current topology reconstruction algorithm based on performance optimization. The results show that the new algorithm can greatly improve the reliability of multi-kernel processing when the number of failure cores is small. In this paper, we try to solve the NP-Complete class problem by using approximate and heuristic methods to reconstruct the core level redundant topology of the multi-core processor. The results can be used for reference or support for the design of core level redundant topology reconstruction scheme of multi-core processor with performance and reliability as the optimization objective.
【学位授予单位】：东华大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TP332

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