抗辐射加固SRAM设计

发布时间：2018-01-21 14:30

本文关键词： 抗辐射加固静态随机存储器单粒子翻转单粒子闩锁纠检错码　出处：《西安电子科技大学》2015年硕士论文　论文类型：学位论文

【摘要】：随着集成电路的高速发展,存储器占据越来越重要的地位。其中,静态随机存储器(SRAM)因其速度快、功耗低已被广泛应用于各种高速存储器中。同时,SRAM在各类航天器件的电路系统中也有着更为广泛的应用。在空间辐射环境中,SRAM会严重受到单粒子翻转效应、单粒子闩锁效应、总剂量效应等的影响。因此,航天用到的SRAM不仅要保证其本身的特性,还应该具备更好的抗辐射性能。本课题源于航天某项目,对其中所需SRAM,进行了抗辐射加固性能的设计。SRAM中最重要的部分是存储单元,首先对标准6管SRAM存储单元的性能和多种具有抗辐射性能的存储单元电路设计进行了分析,设计出能够符合项目指标要求,且具有抗辐射性能的SRAM存储单元。以存储单元为核心,设计具有一定抗辐射性能的外围电路,构成完整的SRAM设计。在电路设计的基础上实现物理版图。着重版图的抗辐射加固方法,以提高抗单粒子性能。然后使用star-RCXT提取版图的^/寄生参数的网表,和使用Hspice与Spectre两个仿真软件进行仿真验证,完成对SRAM的功能和性能的检查验证,以此来满足设计指标。本文的重点在于两个方面。一方面是着重在版图上对SRAM进行抗辐射加固的设计。在版图中,(1)通过增加阱或衬底接触的保护环、保护^/;(2)增加阱或衬底接触上的通孔(CT)孔的数量;(3)拉大N型金属氧化物半导体(NMOS)和P型金属氧化物半导体(PMOS)的距离等多种加固措施加固措施,使SRAM具有很好的抗单粒子效应(SEE)的能力。另一方面是设计纠检错码(EDAC)电路,采用汉明码的编码方式,具有纠一检二的工作方式,能够具有更好的抗单粒子翻转(SEU)效应的能力。而EDAC的版图是由具有抗辐射性能的单元库的基本逻辑单元拼接构成。本项目是基于中芯国际(SMIC)的130nm工艺,使用candance工具进行的设计。通过与某商用SRAM相比,较商用的读写时间慢2秒钟左右。而在抗单粒子效应方面,通过单粒子仿真软件,模拟金(Au)粒子入射存储单元,得到的结果显示无闩锁效应发生;另外又采用EDAC电路,保证不会出现由单粒子效应引起的一位翻转错误,具有良好的抗单粒子效应的性能。
[Abstract]:With the rapid development of integrated circuits, memory occupies a more and more important position. Among them, static random access memory (SRAM) has been widely used in all kinds of high-speed memory because of its high speed and low power consumption. SRAM is also widely used in the circuit system of various spaceflight devices. In the environment of space radiation, SRAM will be seriously affected by single particle flip effect and single particle latch effect. Therefore, the SRAM used in aerospace should not only guarantee its own characteristics, but also have better radiation resistance. The most important part of SRAM is memory cell. Firstly, the performance of the standard 6-tube SRAM memory cell and the design of a variety of memory cell circuits with anti-radiation performance are analyzed, and the design can meet the requirements of the project. The SRAM memory cell with anti-radiation performance is designed with the memory cell as the core, and the peripheral circuit with certain anti-radiation performance is designed. Form a complete SRAM design. Based on the circuit design to achieve physical layout, focusing on the layout of anti-radiation reinforcement method. In order to improve the anti-single particle performance, star-RCXT is used to extract the net table of ^ / parasitic parameters of the layout, and two simulation software, Hspice and Spectre, are used for simulation verification. Check and verify the function and performance of SRAM. This paper focuses on two aspects. On the one hand, it focuses on the design of anti-radiation reinforcement of SRAM on the layout. (1) protect ^ / R by increasing the trap or substrate contact protection ring; (2) increasing the number of CTs on a well or substrate contact; Strengthening measures such as enlarging the distance between N type metal oxide semiconductor (NMOS) and P type metal oxide semiconductor (PMOS). The SRAM has the ability to resist single particle effect (SEE). On the other hand, it designs the error-correcting code (EDAC) circuit, which adopts the hamming code coding method and has the operation mode of correcting one and checking two. The layout of EDAC is composed of basic logical unit splicing of unit library with radiation resistance. This project is based on SMIC (SMIC). The 130nm process of SMICs. Design using candance tools. Compared with a commercial SRAM, the reading and writing time is about 2 seconds slower than that of commercial SRAM. In the aspect of anti-single particle effect, the software of single particle simulation is used. The simulated au) particles incident into the memory cell and the results show that there is no latch effect. In addition, EDAC circuit is used to guarantee that there will not be a bit flip error caused by single particle effect, so it has good performance against single particle effect.
【学位授予单位】：西安电子科技大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TP333

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