UM-BUS总线及接入式体系结构

发布时间：2018-02-27 04:20

本文关键词： 综合电子系统冗余容错高速总线动态重构 “接入式”体系结构 UM-BUS　出处：《电子学报》2015年09期 　论文类型：期刊论文

【摘要】：本文针对航天航空等领域综合电子系统在小型化、一体化设计及信息综合利用等方面的需求,提出一种可动态重构的高速串行通信总线(UM--BUS),采用N(≤32)通道并发传输,通信速率可达6.4Gbps,采用总线型拓扑结构,最大通信距离40m,支持最多30个节点直接互连,具有远程存储访问能力,采用命令应答式协议提供QoS与实时性保证;通过并发通道相互冗余与动态重构,在允许50%性能降低的情况下,能够对N/2通道故障动态容错.在UM-BUS总线基础上,本文提出一种新型的"接入式"体系结构模型,在不改变系统逻辑结构的前提下,能够突破机箱结构限制,将逻辑功能分散嵌入到控制测量对象内部,实现功能模块"接入即用",使得综合电子系统一体化设计成为可能.
[Abstract]:According to the aerospace and other fields in the integrated electronic system miniaturization, integration design and comprehensive utilization of information such as the demand, proposed a high-speed serial communication bus dynamic reconfiguration (UM--BUS), using N (less than 32) concurrent transmission channel, the communication speed can reach 6.4Gbps, the bus topology, the maximum communication distance 40m support up to 30 nodes, interconnected directly with the remote memory access capabilities, using the command response protocol provides QoS and real-time guarantee; through concurrent channels redundancy and dynamic reconfiguration, while allowing 50% to lower, to N/2 channel fault dynamic fault tolerance. Based on UM-BUS bus, this paper proposes a a new type of "access" system structure model, in the premise of not changing the system logic structure, can break the chassis structure limits, will disperse logic function is embedded into the internal control of the measuring object, real The current functional modules "access and use" make it possible for integrated electronic systems to be integrated.

【作者单位】：首都师范大学信息工程学院;北京数学与信息交叉科学2011协同创新中心;山东航天电子技术研究所;北京市高可靠嵌入式系统工程技术研究中心;
【基金】：国家自然科学基金(No.61170009) 北京市自然科学基金(No.4132016) 北京市属高等学校创新团队建设与教师职业发展计划北京市教委科技基地建设项目
【分类号】：TP336

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