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16Mbit FPGA配置存储器设计研究

发布时间:2018-03-03 10:28

  本文选题:FPGA 切入点:配置存储器 出处:《电子科技大学》2012年硕士论文 论文类型:学位论文


【摘要】:伴随半导体工艺和数字集成电路本身不断地更新换代,FPGA(FieldProgrammable Gate Array,现场可编程门阵列)因其自身片上众多的可编程资源和快速灵活的现场可编程特性,已在众多领域得到广泛应用。而SRAM型FPGA其掉电则功能即丢失的特性,使得必须有一颗或多颗非易失存储器与SRAM型FPGA配套使用,用以存储FPGA的配置数据。随着FPGA的规模不断增加,其配置存储器的容量也需越来越大,并且也需要具有非常快速的读取响应时间;再加上为了更好的配合FPGA的上电、掉电、复位以及在系统调试和编程等特性,通用存储器一般不是充当FPGA配置存储器的理想选择,因此专门为FPGA定制的专用配置存储器就有了与FPGA一样的广阔市场和发展前景。 本选题的研究目的是通过深入分析、研究国外先进FPGA配置存储器的设计技术,结合现有工艺的实际水平和此前相关项目的经验基础,尝试形成FPGA配置存储器的设计方法,并研制出可适应市场上主流FPGA的配置方式的“16MbitFPGA配置存储器”的产品。 由于受限于Flash Memory专利技术的壁垒,若要为本选题所研制的“16MbitFPGA配置存储器”专门定制Flash Memory内核则需要花费非常昂贵的费用和较长的时间,因此本选题采用的技术路线是选用拥有Flash Memory专利技术授权的适合的工艺方提供的通用Flash Memory IP,以此为存储内核围绕其进行片上解压缩电路、多版本配置文件选择存储电路和在系统编程电路等功能模块的设计。“16Mbit FPGA配置存储器”采用数字电路正向设计流程,进行了功能设计、仿真、原型验证、综合、布局布线和后仿真完整的设计步骤,最终实现了“16Mbit FPGA配置存储器”的设计开发。 通过和与之配套的烧入软件及FPGA联调测试,目前已完成了对“16MbitFPGA配置存储器”工程样片的功能验证,测试结果符合设计要求,能够适应目前市场上主流FPGA的多种配置应用模式,,实现了预期的目标;所掌握的设计技术可以被利用于今后相类似的项目设计和产品研发中,为同类产品的研发积累了一定的经验。
[Abstract]:With semiconductor technology and digital integrated circuit itself constantly upgrading, FPGA (FieldProgrammable Gate Array, field programmable gate array) because of its large on-chip programmable resources and fast and flexible field programmable characteristics, has been widely used in many fields. But SRAM FPGA the power down function is lost the characteristics, there must be one or a plurality of non-volatile memory and supporting the use of SRAM FPGA to FPGA configuration data storage. With the scale of FPGA is increasing, the allocation of memory capacity also needs more and more, and also needs to have a very fast read response time; add to power with FPGA, the better off power and reset in the system debugging and programming features, general memory is generally not act as the ideal choice of the FPGA configuration memory, therefore specially tailored for FPGA special configuration storage The reservoir has the same broad market and prospects as FPGA.
The purpose of this research is through in-depth analysis, research on design technology of foreign advanced FPGA configuration memory, combined with the actual level of experience of the existing technology and previous projects, design methods try to form FPGA configuration memory, and can be developed to adapt to the market mainstream FPGA configuration "16MbitFPGA configuration memory" products.
Due to the limited Flash Memory patented technology barriers to this topic developed "16MbitFPGA configuration memory" customized Flash Memory kernel requires very expensive cost and long time, so the technical route of this topic is choosing the general Flash Memory IP has the suitable technology authorized Flash Memory patented technology provide, to store the kernel around its on-chip decompression circuit, multi version configuration file selection and storage circuit in the design of the system programming circuit module. The 16Mbit FPGA configuration memory "by digital circuit top-down design process, the function design, simulation, verification, synthesis, simulation, layout design steps and after complete, finally realized" the design and development of 16Mbit FPGA configuration memory ".
By and with the support of the burning software and FPGA test, has completed the "16MbitFPGA configuration memory" sample verification, the test results meet the design requirements, can adapt to the current market mainstream FPGA configuration application mode, to achieve the desired objectives; the design techniques can be used in the future similar project design and product development, accumulated some experience for the development of similar products.

【学位授予单位】:电子科技大学
【学位级别】:硕士
【学位授予年份】:2012
【分类号】:TP333;TN791

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