阻变存储阵列测量系统研究与实现

发布时间：2018-03-07 13:38

本文选题：阻变存储器　切入点：测量系统　出处：《山东大学》2017年硕士论文　论文类型：学位论文

【摘要】：随着半导体技术的发展,目前基于电荷存储机制的非易失性存储器因为尺寸缩小带来的漏电荷问题越来越严重,传统采用缩小尺寸方法提高存储密度的操作变得越来越困难。人们急需通过寻找新材料、设计新结构等方法来提高存储器性能,而阻变存储器具有结构简单、操作电压低、擦写/编程速度高以及与传统CMOS工艺兼容等优点,存储潜力大,有望取代现有闪存成为下一代非易失性存储器。近年来科研人员加快了对阻变存储器研究步伐,ITRS预测RRAM在2020年可能达到量产,但目前通用的测试系统中并没有专门针对阻变存储器的测量系统,所以研发相关的测量系统迫在眉睫。由于RRAM研究尚不够成熟,器件均一性和耐受性差,所以其测量方法比较特别,既需要直流扫描测量,也需要脉冲测量,而现有通用设备一般只能用于直流扫描测试,测量精度高但扫描时间不确定,很容易对器件造成损伤,因此无法满足RRAM性能测试的全部要求。本课题在研究了相关的阻变存储器工作原理和测量特性的基础上,主要针对现有通用半导体测试设备用于阻变存储器测试的不足之处,设计一套用于阻变存储器阵列测试的测量系统。并且结合阻变存储器测量原理总结了针对RRAM的高速脉冲测量方法和脉冲幅度渐高式操作方式,设计了相关测量方案,完成了测量系统的设计与实现。最后利用测量系统进行了相应的阻变存储器芯片测试,验证了系统的可行性和实用性。主要工作包括分析测量需求,总结测量方法,设计测量方案;设计FPGA下位机功能程序;完成系统各模块电路原理图设计及相关PCB设计和电路调试、优化;设计测量方案,配合系统完成RRAM测量验证。最终测量系统能够满足1Kbit阻变存储阵列测量需求,具有32路PMU通道输出和32路器件选通能力。输出信号范围为0～4V,脉冲宽度范围50ns-4s,最小测量电流为20nA,驱动能力50mA,基本满足RRAM测量要求。
[Abstract]:With the development of semiconductor technology, the current non-volatile memory based on charge storage mechanism has become more and more serious because of the problem of leakage caused by shrinking size. It is becoming more and more difficult to improve the storage density by reducing the size of the memory. People urgently need to find new materials and design new structures to improve the memory performance, while the resistive memory has the advantages of simple structure and low operating voltage. High speed of erasure / programming and compatibility with traditional CMOS process, so it has great storage potential. It is expected to replace existing flash memory as the next generation of non-volatile memory. In recent years, researchers have accelerated the pace of research on antiresistive memory. ITRS predicts that RRAM may reach mass production in 2020. But at present, there is no measuring system for resistive memory in the universal test system, so it is urgent to develop the related measurement system. Because the research of RRAM is not mature enough, the uniformity and tolerance of devices are poor. So its measuring method is very special, it needs both DC scan measurement and pulse measurement, but the existing universal equipment can only be used for DC scanning test. The measurement accuracy is high, but the scanning time is uncertain, so it is easy to damage the device. Therefore, it can not meet all the requirements of RRAM performance testing. Based on the study of the working principle and measurement characteristics of the resistive memory, this paper mainly aims at the shortcomings of the existing universal semiconductor test equipment used in the testing of the resistive memory. This paper designs a measuring system for the test of resistive memory array, and summarizes the high speed pulse measurement method and the pulse amplitude increasing operation mode for RRAM, and designs the related measurement scheme, which is based on the principle of resistive memory measurement. The design and implementation of the measurement system are completed. Finally, the test of the resistive memory chip is carried out using the measurement system, which verifies the feasibility and practicability of the system. The main work includes analyzing the measurement requirements and summarizing the measurement methods. Design measurement scheme; design FPGA lower computer function program; complete the circuit schematic design of each module of the system and related PCB design and circuit debugging, optimization; design measurement scheme, Finally, the measurement system can meet the requirement of 1kbit resistive memory array measurement. It has 32 PMU channel output and 32 channel device gating ability, the output signal range is 0 ~ 4V, pulse width range is 50ns-4s, minimum measuring current is 20nA, driving capacity is 50mA. it basically meets the requirement of RRAM measurement.
【学位授予单位】：山东大学
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：TP333

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