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基于PCI互连的嵌入式多处理器系统通信机制研究

发布时间:2018-03-14 09:05

  本文选题:嵌入式多处理器 切入点:PCI总线 出处:《华中科技大学》2012年硕士论文 论文类型:学位论文


【摘要】:在安防、图像处理、语音识别、网络通信等计算密集型应用领域,市面单颗嵌入式处理器的性能提升速度常常满足不了人们的需求。应用开发商往往会选择一种称为嵌入式多处理器方案。该方案以一定方式互连多颗嵌入式多处理器,借助芯片并行设计和软件协同处理来达到性能倍增的效果。在所有的嵌入式处理器互连方式中,PCI总线以其高带宽、通用性、成熟性以及低成本尤为引人瞩目。本文主要研究对象为基于PCI互连的嵌入式多处理器系统,,重点研究其中较为核心的片间通信机制。 本文首先介绍了嵌入式多处理器通信原理,通过对比双口RAM、以太网总线、PCI总线以及Mesh架构等互连方式的特点以及适用范围,总结了PCI互连的优势,在此基础上归纳了PCI互连所要解决的主要问题。接着本文通过分析现有TCP/IPOver PCI方案的不足,设计了一种通用的面向嵌入式多处理器的并发通信模型。该模型以PCI内存映射为基础,通过对通道划分、报文格式、数据传输机制、管理机制等一系列核心问题讨论,提出了一套完整的基于PCI的端到端通信方案。该方案可满足跨越CPU节点的进程间的高效、并发、对等通信需求。本文接下来基于Linux2.6.14内核以及Hi3511双处理器系统,对模型进行了详细实现和完整测试。最后对整个测试结果进行了具体分析,并对下一阶段的研究工作进行了展望。
[Abstract]:In computational intensive applications such as security, image processing, speech recognition, network communications, etc. The performance improvement speed of a single embedded processor in the market is often unable to meet the needs of people. Application developers often choose an embedded multi-processor solution, which interconnects multiple embedded multi-processors in a certain way. With the help of chip concurrent design and software collaborative processing, the performance can be doubled. In all embedded processor interconnection modes, PCI bus has high bandwidth and versatility. The maturity and low cost of embedded multi-processor systems based on PCI interconnection are the main research objects of this paper, with emphasis on the inter-chip communication mechanism. This paper first introduces the principle of embedded multi-processor communication, and summarizes the advantages of PCI interconnection by comparing the characteristics and application scope of dual-port Ram, Ethernet bus, PCI bus and Mesh architecture. On this basis, the main problems to be solved in PCI interconnection are summarized. Then, by analyzing the shortcomings of existing TCP/IPOver PCI schemes, a general concurrent communication model for embedded multi-processors is designed. The model is based on PCI memory mapping. A complete end-to-end communication scheme based on PCI is proposed by discussing a series of core issues, such as channel partition, message format, data transmission mechanism, management mechanism, etc. This scheme can meet the needs of efficient and concurrent interprocess across CPU nodes. Next, based on the Linux2.6.14 kernel and Hi3511 dual-processor system, the model is implemented and tested in detail. Finally, the whole test results are analyzed in detail, and the research work in the next stage is prospected.
【学位授予单位】:华中科技大学
【学位级别】:硕士
【学位授予年份】:2012
【分类号】:TP368.1

【参考文献】

相关期刊论文 前3条

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3 罗万明,林闯,阎保平;TCP/IP拥塞控制研究[J];计算机学报;2001年01期



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