基于VHDL的故障注入工具的研究与实现

发布时间：2018-03-18 12:54

本文选题：可靠性　切入点：故障注入　出处：《哈尔滨工业大学》2013年硕士论文　论文类型：学位论文

【摘要】：近年来，计算机技术呈现出迅猛的发展态势。它所应用到的航空、航天等特殊领域要求它要具有很高的可靠性。由于FPGA具有运算快速和编程简单等优点，因此它被广泛应用到航天容错计算机的设计当中。近年来，针对这种计算机的可靠性评测也被越来越多的设计人员所重视。而故障注入技术是现如今一种重要的可靠性评测方法。故障注入工具的实现则可以为容错计算机的研究带来巨大的帮助。本文针对目前主流故障注入技术的理论基础进行了深入的研究，为故障注入工具的实现做好了理论储备。本文课题来源中的容错计算机使用了硬件描述语言VHDL。因此，本文主要研究了基于VHDL的故障注入技术。该技术中的“突变”方法可以很好的支持注入多种类型的故障，并且不改变目标系统模型的结构。基于这种技术，本文设计并实现了一个故障注入工具。该工具可以对基于VHDL语言建模的系统进行故障注入。它通过分析VHDL源文件中的代码来找出系统中可以注入的对象，然后使用CASE语句修改源代码，最后通过仿真器进行故障注入仿真实验。它可以支持注入多种类型的故障，包括固定0、固定1和位翻转，，同时可以选择的故障时间为永久故障、瞬时故障和间歇故障。最后本文使用设计实现的故障注入工具对课题来源中的容错计算机进行了多种故障注入实验，注入对象为该系统容错机制中的一些重要信号。实验结果验证了系统容错机制的可靠性。同时，实验结果也证明注入工具可以有效地对基于VHDL实现的系统进行故障注入。
[Abstract]:In recent years, computer technology has shown a rapid development trend. The special fields such as aviation and spaceflight require it to have high reliability. Because of the advantages of FPGA, such as fast operation and simple programming, etc. Therefore, it is widely used in the design of aerospace fault-tolerant computer. More and more designers pay attention to the reliability evaluation of this kind of computer. Fault injection technology is an important reliability evaluation method nowadays. The fault injection tool can be implemented as a fault-tolerant computer. The research in 1921 has been of great help. In this paper, the theoretical foundation of the current mainstream fault injection technology is deeply studied, and the theoretical reserve is made for the implementation of the fault injection tool. The fault tolerant computer in the source of this paper uses the hardware description language VHDL. This paper mainly studies the fault injection technology based on VHDL. The "mutation" method in this technology can support the injection of many kinds of faults well, and does not change the structure of the target system model. In this paper, a fault injection tool is designed and implemented. The tool can be used for fault injection of a system based on VHDL language. It finds out the objects that can be injected into the system by analyzing the code in the VHDL source file. Then the source code is modified by using the CASE statement, and the simulation experiment of fault injection is carried out through the simulator. It can support the injection of many kinds of faults, including fixed 0, fixed 1 and bit flip, and the fault time can be chosen as permanent fault. Transient and intermittent failures. Finally, this paper uses the designed and implemented fault injection tools to carry out a variety of fault injection experiments on fault-tolerant computers in the subject source. The injection object is some important signals in the fault-tolerant mechanism of the system. The experimental results verify the reliability of the fault-tolerant mechanism of the system. At the same time, the experimental results also prove that the injection tool can effectively inject the fault of the system based on VHDL.
【学位授予单位】：哈尔滨工业大学
【学位级别】：硕士
【学位授予年份】：2013
【分类号】：TP302.8

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