在线式电能质量分析仪数据存储与传输技术的研究

发布时间：2018-03-19 13:34

本文选题：片上可编程系统　切入点：现场可编程门阵列　出处：《北京化工大学》2012年硕士论文　论文类型：学位论文

【摘要】：随着智能电网技术的快速发展，越来越多影响电能质量的设备被引入电网中，通常需要采用电能质量分析仪对电参数进行监测，而监测过程会产生海量的数据参数需要处理，这些参数往往还需要长久保存，若不进行实时压缩存储并传输，它们将对电能质量分析结果产生较大的负面影响。论文通过对在线式电能质量分析仪中海量数据存储及传输技术问题的研究，试图找到解决海量实时数据进行压缩存储及传输问题的方法，本文采用片上可编程技术SOPC，设计了一个以Xilinx公司的FPGA为核心芯片来实现电能质量分析仪中数据存储和传输的系统。首先，论文介绍了课题研究的背景和意义，，简要叙述了SOPC技术进行嵌入式开发的优点及Xilinx的SOPC开发流程，随后介绍了MicroBlaze软核处理器及其相关IP核技术，再介绍了系统的总体设计方案及LZW压缩技术，并对LZW算法进行了改进。其次，整个系统确定了基于电能质量分析仪数据存储及传输的硬件设计方案。通过对各种芯片的选型，编写了基于该硬件平台板级描述XBD文件，并通过该文件建立了最小系统。根据电能质量分析仪数据存储及传输系统的功能添加了所需要IP核到最小系统中，这些IP核包括快速链接FSL总线IP核，串口通信控制器IP核、实时时钟IIC总线IP核、CF卡存储SysACE控制器的IP核、以太网传输控制器IP核以及FPGA与DSP之间通信的用户自定义IP。再次，确定了基于该系统的软件设计方案。基于该硬件平台系统进行了数据接收存储及传输的软件程序设计主要实现了下列功能：串口通信，FPGA通过FSL总线从DSP端接收数据，FPGA采用CF卡存储数据和LZW压缩数据，FPGA通过以太网接口由LwIP协议上传数据到上位机。最后，通过软件编程分别实现了电能质量分析仪中数据存储及传输系统中的各大模块，对各模块进行了测试并得出各测试过程的结果。通过对整体系统模块之间联合测试，验证了整个系统的正确性。
[Abstract]:With the rapid development of smart grid technology, more and more devices affecting power quality are introduced into the power grid. It is usually necessary to use power quality analyzer to monitor electrical parameters, and the monitoring process will produce a large number of data parameters to be processed. These parameters often need to be preserved for a long time. If they are not compressed and transmitted in real time, they will have a great negative impact on the results of power quality analysis. Based on the research of mass data storage and transmission technology in on-line power quality analyzer, this paper tries to find a way to solve the problem of compressed storage and transmission of mass real-time data. In this paper, a data storage and transmission system in power quality analyzer based on Xilinx's FPGA chip is designed by using the on-chip programmable technology (SOPC). Firstly, the paper introduces the background and significance of the research, briefly describes the advantages of SOPC technology in embedded development and the SOPC development process of Xilinx, and then introduces the MicroBlaze soft core processor and its related IP core technology. The overall design scheme and LZW compression technology of the system are introduced, and the LZW algorithm is improved. Secondly, the whole system determines the hardware design scheme based on the data storage and transmission of the power quality analyzer. Through the selection of various chips, a description XBD file is compiled based on the hardware platform. According to the function of the data storage and transmission system of the power quality analyzer, the required IP core is added to the minimum system. These IP cores include the fast link FSL bus IP core, the serial communication controller IP core. Real time clock IIC bus IP core CF card stores IP core of SysACE controller Ethernet transfer controller IP core and user-defined IPs for communication between FPGA and DSP. Again, The software design scheme based on this system is determined. The software program design of data receiving, storage and transmission based on the hardware platform mainly realizes the following functions: serial port communication FPGA receives the number of data from DSP side through FSL bus. According to FPGA, CF card is used to store data and LZW compressed data is uploaded from LwIP protocol to upper computer via Ethernet interface. Finally, each module of the data storage and transmission system in the power quality analyzer is realized by software programming, and the test results of each module are obtained. The correctness of the whole system is verified.
【学位授予单位】：北京化工大学
【学位级别】：硕士
【学位授予年份】：2012
【分类号】：TP368.1;TN47

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