基于NAND闪存管理架构的嵌入式设备烧片软件研究与设计

发布时间：2018-03-19 22:39

本文选题：NAND　切入点：Flash　出处：《上海交通大学》2013年硕士论文　论文类型：学位论文

【摘要】：近年来，作为嵌入式应用典型的手机行业，随着iOS和Android用户操作系统的发展和成熟，新的智能机产品逐渐兴起和普及，进而替代过去功能机所占据的庞大市场份额。而随着产品形态的演变，在产线流程上也相应地提出了一些新的需求。在手机行业中，出于产品形态、需求、功能等各方面因素的考虑，NAND Flash被广泛用作手机的可掉电存储设备。而NAND Flash由于其工艺的特殊性，必须使用专门的算法或管理软件来对其进行操作和维护，并且管理软件或算法的好坏很大程度上会影响设备的性能和效率。XSR闪存管理架构是当前手机行业中被广泛使用的NANDFlash管理软件，其在各大品牌的中高端旗舰智能机以及中小品牌的低端功能机上被广泛使用，其稳定性和性能、效率都经过了大规模量产的检验。在产线流程上，过去功能机时代由于软件程序小，下载时间也较短，没有必要采用更快、更效率的ROM Writer烧片下载方式，即便有项目采用了烧片，也很少有基于XSR闪存管理架构的。而随着智能机软件程序越来越大，软件下载等待时间越来越长，过去的产线流程逐渐不适用于行业发展的要求，ROM Writer烧片开始变得越来越有必要，尤其在销量非常大的产品上烧片对提升产线效率、削减产线成本方面帮助尤为明显。而对于NAND Flash设备的烧片，有别于传统的直接烧录，需要根据手机所使用的闪存管理软件进行烧片软件设计。XSR架构作为目前手机行业被广泛使用的闪存管理软件，针对其进行ROM Writer烧片方案的设计有非常迫切的需求。虽然ROMWriter烧片本身是已经成熟的市场技术，但基于XSR闪存优化管理架构的ROM Writer烧片，是在烧片中加入新的要求，来达到完善NAND存储优化管理的目的，是当前智能机市场下的一个新的市场需求。本文深入分析了XSR闪存管理架构，，设计和完善基于XSR架构的ROM Writer烧片软件程序。基于XSR架构的ROM Writer烧片流程主要实现了XSR的Reservoir管理区的生成，构建用于NAND坏块替换的映射表，并根据当前已有的每256字节计算3字节ECC校验码进行1bit检错纠错的算法，扩展为每512字节计算3字节ECC校验码以更好的匹配适应NAND Flash的基本单位扇区的大小。最终基于XSR闪存管理架构的ROM Writer烧片设计的实现与完善，有效的提升了产线生产效率、降低了生产成本，取得了预期的效果。
[Abstract]:In recent years, as a typical mobile phone industry with embedded applications, with the development and maturity of iOS and Android user operating system, new smartphone products are gradually rising and popularizing. Then it replaces the huge market share occupied by the function machine in the past, and with the evolution of the product form, some new demands are put forward accordingly in the production line process. In the mobile phone industry, for the consideration of various factors, such as product form, demand, function and so on, NAND Flash is widely used as a power-down storage device for mobile phones. Special algorithms or management software must be used to operate and maintain them, And the quality of management software or algorithms will greatly affect the performance and efficiency of devices. XSR flash memory management framework is widely used in the mobile phone industry NANDFlash management software. Its stability, performance and efficiency have been tested by mass production. It is widely used in medium and high-end flagship smart machines and low-end function machines of small and medium-sized brands, and its stability, performance and efficiency have been tested by mass production. In the production line process, because software programs were small and download time was shorter in the past, there was no need for faster and more efficient ROM Writer burning, even if there were projects that used burning. Few are based on the XSR flash memory management architecture, and as the smartphone software program grows larger, the waiting time for software downloads grows longer. Past production line processes have become less and less suitable for industry development. Writer burning is becoming more and more necessary, especially for highly sold products to improve line efficiency. Cutting production costs is particularly helpful. For NAND Flash devices, burning is different from conventional direct burning. According to the flash memory management software used in mobile phones, we need to design the chip burning software. XSR architecture is widely used as flash memory management software in the mobile phone industry. There is an urgent need for the design of the ROMWriter chip burning scheme. Although the ROMWriter burning is a mature market technology, the ROMWriter chip burning based on the XSR flash memory optimization management architecture is to add new requirements to the burning chip. To improve the NAND storage optimization management is a new market demand under the current smart machine market. This paper deeply analyzes the XSR flash memory management architecture, designs and perfects the ROM Writer burn software program based on the XSR architecture. The ROM Writer burning process based on the XSR architecture mainly realizes the Reservoir management area generation of XSR, and constructs the mapping table for NAND bad block replacement. And according to the existing 1 bit error detection and correction algorithm for calculating 3 byte ECC check code for every 256-byte, It is extended to calculate 3-byte ECC check code every 512-byte to better match the size of basic unit sector of NAND Flash. Finally, the design of ROM Writer chip based on XSR flash memory management architecture is realized and perfected, which effectively improves the productivity of production line. The production cost is reduced and the expected effect is achieved.
【学位授予单位】：上海交通大学
【学位级别】：硕士
【学位授予年份】：2013
【分类号】：TP333;TP311.5

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