基于PCI-E总线的高速数据传输与存储的系统设计

发布时间：2018-03-25 03:22

本文选题：PCIe　切入点：Sora　出处：《北京邮电大学》2014年硕士论文

【摘要】：随着无线通信技术的发展,软件无线电(SDR)技术逐渐成为研究者的关注热点。SDR技术将硬件实现的无线通信协议搬移到软件中实现,不仅简化了硬件系统的设计,还可实现硬件平台通用和软件灵活重配的目的。软件无线电平台要求数字信号被及时传输到软件中进行处理,同时还要求及时的反馈能力,这需要一个软硬件之间的高速数据传输通道。PCI-Express (PCIe)作为最新的总线接口标准,具备承担SDR硬件平台的数据传输任务的能力,还有足够的传输带宽余量用于未来的系统升级。因此,本论文基于微软Sora SDR平台设计了基于PCIe总线的高速数据传输通道,还完成了数据存储的设计方案和算法实现。论文首先实现了基于Xilinx PCIe IP核的高速数据传输接口设计。任务内容主要包括Sora硬件平台PCIe接口的链路训练验证,IP核事物层逻辑设计和直接内存存取(DMA)控制器设计。DMA控制器的功能是完成数据包的分流处理,请求与应答和高速数据传输。其次,针对硬件接口实现了Linux下的驱动设计。PCIe设备在Linux平台下属于字符设备,作者基于字符驱动框架完成了对硬件平台PCIe设备的读写功能,输入输出(I/O)控制以及物理内存向设备空间的映射；驱动为上层用户提供了访问设备的接口,基于这些接口,利用开源MPrace软件库,实现了应用层对设备的访问并完成了论文设计的系统测试,有效的推动了依托项目的顺利实施。最后,利用驱动接口和MPrace相关函数实现了数据存储算法。该算法采用循环内存读写,以读写线程并发执行来实现数据实时保存,同时提出了更高速的磁盘阵列(RAID)阵列扩展方案。作者进行了大量的测试工作,根据测试结果分析了DMA读写的时序逻辑,给出了正确性判断。
[Abstract]:With the development of wireless communication technology, Software Radio SDR (SDR) technology has gradually become the focus of attention of researchers. SDR technology moves the wireless communication protocol implemented by hardware into software, which not only simplifies the design of hardware system, but also simplifies the design of hardware system. The software radio platform requires the digital signal to be transmitted to the software in time for processing, and also requires the timely feedback ability. This requires a high-speed data transfer channel between hardware and software. PCI-Express / PCI) as the latest bus interface standard, with the ability to undertake the task of data transmission on the SDR hardware platform, and sufficient bandwidth allowance for future system upgrades. In this paper, a high speed data transmission channel based on PCIe bus is designed based on Microsoft Sora SDR platform, and the design scheme and algorithm implementation of data storage are also completed. The design of high speed data transmission interface based on Xilinx PCIe IP core is implemented in this paper. The task includes link training verification of PCIe interface of Sora hardware platform and logic design of IP core and direct memory access (DMA) controller. The function of the DMA controller is to complete the data packet shunt processing, Request and reply and high speed data transmission. Secondly, according to the hardware interface, the driver design under Linux. The PCIe device belongs to the character device under the Linux platform. The author completes the reading and writing function of the hardware platform PCIe device based on the character drive frame. I / O) control and the mapping of physical memory to device space; drivers provide interface access to devices for upper-level users; based on these interfaces, open source MPrace software libraries are used. It realizes the access of application layer to the equipment and completes the system test of the thesis design, which effectively promotes the smooth implementation of the supporting project. Finally, the data storage algorithm is implemented by using driver interface and MPrace correlation function, which uses cyclic memory to read and write, read and write threads to execute concurrently to realize real-time data saving. At the same time, a more high-speed expansion scheme of disk array array is proposed. The author has done a lot of testing work. According to the test results, the sequential logic of DMA reading and writing is analyzed, and the correctness judgment is given.
【学位授予单位】：北京邮电大学
【学位级别】：硕士
【学位授予年份】：2014
【分类号】：TP333;TN92

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