宽带数字射频直接存储与处理技术研究

发布时间：2018-03-28 16:39

本文选题：数字射频存储器　切入点：射频仿真　出处：《南京航空航天大学》2012年硕士论文

【摘要】：数字射频存储器(DRFM)通过对接收到的雷达高中频信号进行宽带采样、实时存储、处理与重构的方式来实现对雷达目标回波信号的模拟。DRFM对目标回波的模拟具有相干性好、模拟目标速度、距离精确且可控等优点，是射频仿真系统中的关键组成部分。DRFM还可以产生各种假目标欺骗干扰信号、噪声干扰信号、背景杂波信号等，因而在电子对抗领域也有着广泛的应用。随着现代通信、雷达技术的快速发展，特别是宽带雷达系统发展所提出的需求，宽带DRFM系统的研制已成为当务之急。本文结合某型号相参雷达目标、杂波与欺骗干扰模拟器研制项目，针对项目提出的具体技术要求，展开了对宽带DRFM系统硬件平台的设计与实现工作。首先研究了宽带DRFM系统的高速电路结构，给出了以大容量FPGA、宽带ADC和DAC器件为核心的系统实现方案。在此基础上，依据自顶向下的设计方法，完成了系统硬件从最顶层架构到最底层电路实现的详细设计过程，对关键模块的设计进行了分析并给出了实物电路。完成了高速PCB电路的设计，并对系统中高速信号总线进行了信号完整性分析。其次，针对输入雷达信号功率范围较大的特点，给出了一种基于FPGA的数字自动增益控制系统的实现方案，完成了硬件电路及软件算法的设计与实现，结合模拟器下变频网络对该系统进行了调试，仿真及实测结果均表明该自动增益控制系统具有响应时间短、增益调节精度高、系统参数控制灵活的特点。最后，对宽带DRFM系统的硬件进行了调试，详细分析了宽带ADC和DAC模块的性能指标，研究了寄生信号电平产生的原理，，并分析了降低寄生信号电平的可能方法。在硬件调试的工作基础上，结合模拟器软件功能，对系统进行了联合调试，并给出了部分实测波形。最终测试结果表明，该宽带DRFM系统具有500MHz以上的瞬时带宽、-50dBc以上的杂散电平等特点，可实现宽带相参雷达的目标、欺骗干扰、窄带噪声模拟等功能，目标距离模拟范围可达200m~300km，目标多普勒频率模拟范围-1MHz~1MHz，满足了某型号雷达导引头射频仿真的需求，达到了预期的效果。
[Abstract]:Digital Radio Frequency memory (DRFM) achieves the simulation of radar target echo signal by wideband sampling, real-time storage, processing and reconstruction. DRFM has good coherence for target echo simulation. DRFM is the key component of radio frequency simulation system. DRFM can also produce all kinds of false target deceptive jamming signal, noise jamming signal, background clutter signal and so on. With the rapid development of modern communication and radar technology, especially the demand of broadband radar system, the development of broadband DRFM system has become an urgent task. In this paper, based on the development of a coherent radar target, clutter and deception jamming simulator, the specific technical requirements for the project are put forward. The design and implementation of the hardware platform of broadband DRFM system are carried out. Firstly, the high-speed circuit structure of broadband DRFM system is studied, and the system implementation scheme with large capacity FPGA, broadband ADC and DAC devices as the core is given. According to the top-down design method, the detailed design process of the system hardware from the top-level architecture to the lowest level circuit is completed, and the design of the key modules is analyzed and the physical circuit is given. The design of the high-speed PCB circuit is completed. The signal integrity of high speed signal bus in the system is analyzed. Secondly, in view of the large power range of input radar signal, a scheme of digital automatic gain control system based on FPGA is presented, and the hardware circuit and software algorithm are designed and implemented. The system is debugged with the down-conversion network of simulator. The simulation and the measured results show that the automatic gain control system has the characteristics of short response time, high precision of gain regulation and flexible control of system parameters. Finally, the hardware of broadband DRFM system is debugged, the performance index of broadband ADC and DAC module is analyzed in detail, and the principle of parasitic signal level generation is studied. On the basis of hardware debugging, combined with the software function of simulator, the system is debugged jointly, and some measured waveforms are given. The final test results show that, The wideband DRFM system has the characteristics of spurious level of the instantaneous bandwidth above 500MHz (-50dBc), and can realize the target, deceptive jamming and narrowband noise simulation of wideband coherent radar. The range of target range can be up to 300km and the range of Doppler frequency of target is -1MHz ~ (-1) MHz, which meets the requirements of a certain type of radar seeker radio frequency simulation and achieves the desired results.
【学位授予单位】：南京航空航天大学
【学位级别】：硕士
【学位授予年份】：2012
【分类号】：TP333;TN957.51

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