基于FPGA的SOPC嵌入式系统设计技术的研究与应用

发布时间：2018-04-08 15:43

本文选题：嵌入式系统　切入点：FPGA　出处：《北京工业大学》2012年硕士论文

【摘要】：本课题的研究以作者所属实验室正在进行的GB18240.7税控商业自动化管理系统为背景，提出并详细介绍了一种基于Altera SOPC技术的嵌入式系统设计方法，并结合网络税控器系统进一步讨论了针对基于FPGA的SOPC嵌入式系统设计技术的研究与应用。本课题所研究内容属于GB18240.7税控商业自动化管理系统的一部分。该系统的主要目的是针对大中型商场及超市进行现有税收和申报制度的改进和完善。具体通过网络税控器对每一单购物票据每一笔交易进行监控、记录和统计，向服务器提交，并根据统计到的营业额进行征税，以此完善税控机制，，促进税控手段的电子信息化和现代化。本文基于Altera SOPC技术为网络税控器提出了一种嵌入式系统解决方案，Altera SOPC以FPGA(Field Programmable Gate Array)现场可编程门阵列为硬件基础，构成一个可编程片上系统(SOPC)。其中网络税控器采用了Altera NiosII嵌入式软核处理器，文中对网络税控器SOPC系统的搭建进行了详尽的介绍。网络税控器采用μClinux作为操作系统。本文结合Altera Nios II嵌入式软核处理器体系结构阐述了μClinux针对该处理器架构及其SOPC系统平台的配置裁剪、编译移植，分别介绍了μClinux压缩映像以及Bootloader的相关原理。此外，本文介绍了μClinux中交叉编译开发环境的建立、μClinux上应用程序的开发方法，以及Linux设备驱动的特性和开发方法，并综合以上技术点对税控业务应用进行了设计开发和部署，并且提出了以掉电保护模块为主的改进方案，进行了详细介绍和阐述。本课题所进行研究和设计的现实意义不仅在于该网络税控器系统对促进我国税务工作的信息化、自动化建设有着十分积极的作用，而且文中所提出的嵌入式系统设计开发方法和流程，对于同类设备系统的设计开发也具有一定的研究和利用价值。
[Abstract]:The research of this subject is based on the GB18240.7 tax control business automation management system which is being carried out in the laboratory of the author, and a design method of embedded system based on Altera SOPC technology is proposed and introduced in detail.The research and application of SOPC embedded system design technology based on FPGA are further discussed in combination with the network tax controller system.This subject is a part of GB18240.7 tax control business automation management system.The main purpose of this system is to improve and perfect the existing tax and declaration system for large and medium-sized shopping malls and supermarkets.Through the network tax controller to monitor, record and statistics each transaction of a single purchase bill, submit it to the server, and tax it according to the turnover, so as to perfect the tax control mechanism.To promote the electronic means of tax control information and modernization.This paper presents an embedded system solution for the network tax controller based on Altera SOPC technology. Based on FPGA(Field Programmable Gate array, an embedded system based on FPGA(Field Programmable Gate array is proposed.The Altera NiosII embedded soft core processor is used in the network tax controller. The construction of the SOPC system of the network tax controller is introduced in detail.The network tax controller uses 渭 Clinux as the operating system.Based on the architecture of Altera Nios II embedded soft core processor, this paper describes the configuration tailoring and porting of 渭 Clinux for the processor architecture and its SOPC system platform, and introduces the 渭 Clinux compression image and the related principles of Bootloader respectively.In addition, this paper introduces the establishment of cross-compiling and developing environment in 渭 Clinux, the development method of application program on 渭 Clinux, the characteristics and methods of Linux device driver, and the design, development and deployment of tax control business application based on the above technical points.The improvement scheme of power-loss protection module is put forward, which is introduced and explained in detail.The practical significance of the research and design of this subject lies not only in the fact that the network tax controller system plays a very active role in promoting the informatization and automation construction of tax work in our country.Moreover, the method and flow of embedded system design and development proposed in this paper also have certain research and utilization value for the design and development of the same kind of equipment system.
【学位授予单位】：北京工业大学
【学位级别】：硕士
【学位授予年份】：2012
【分类号】：TP368.1;TN47

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