多通道固态盘系统的设计与实现

发布时间：2018-04-10 17:49

本文选题：固态盘 + 多通道　；参考：《华中科技大学》2012年硕士论文

【摘要】：传统硬盘因内部存在机械运行部件，导致其速度慢，功率大且抗震性差。固态盘(Solid State Disk，SSD)以闪存作为存储介质，拥有高性能、低功耗和低噪声等诸多优点，在很多应用领域中，是传统硬盘的理想替代品。Flash的固有读写延迟，导致单片Flash读写速度不高，接口带宽受限。由于MLC(Multi-Level Cell) Flash的出现，这个问题变得越来越严重。随着Flash应用技术的不断改进，用户对设备的读写速度要求也逐渐提高，单颗粒或者单通道的闪存设备的接口带宽已经远远不能满足用户的要求。为了解决闪存芯片接口的读写带宽瓶颈，采用了固态存储设备的多通道的设计。多通道闪存设备的优点在于多通道能并行操作，成倍地提高固态存储设备的读写带宽。在分析多通道固态盘的硬件架构的基础上，提出相应的管理层体系架构，完成了该固态盘存储系统的设计与实现：包括系统区与数据区的划分，队列管理、缓冲区管理、并行存储管理和闪存转换层。该系统通过多通道的并行和通道间的流水，实现了数据的并行传输，有效的提高了固态盘读写速度和系统容量。并且，为了与目前主流接口无缝衔接，采用了队列管理，分离了读写队列，设计了执行队列和完成队列。该系统设计中包括数据缓冲策略，减少热数据对Flash的写操作，提高了读写性能以及Flash的寿命。此外，该系统设置了Flash转换层，完成地址映射，垃圾回收等。Flash转换层的地址映射采用高效的页映射方式，，由于页映射方式对于SDRAM的消耗较大，又提出了根据负载部分调入映射表的映射方式以及两级页映射的映射方法，这两种方法都有效的减少了映射表对SDRAM的消耗。由于Flash控制器是基于Altera公司的EP2C35F484C6N FPGA实现的，其属于中低端的FPGA，且系统无操作系统支持。所以，FTL层的测试性能只有Flash控制器端的不足40%。在多通道的架构及管理下，读写性能比较单颗粒的方式均有所加倍。
[Abstract]:The traditional hard disk has low speed, high power and poor seismic resistance because of the mechanical components inside.Solid State disk SSDs use flash memory as storage medium, which has many advantages, such as high performance, low power consumption and low noise. In many applications, it is the ideal substitute for traditional hard disk. Flash is the ideal substitute for the inherent read-write delay, which leads to the low read-write speed of monolithic Flash.The interface bandwidth is limited.With the emergence of MLC(Multi-Level Cell Flash, the problem becomes more and more serious.With the continuous improvement of Flash application technology, users' requirements for the speed of reading and writing of devices are also gradually increased. The interface bandwidth of single particle or single channel flash memory devices is far from being able to meet the requirements of users.In order to solve the bottleneck of read and write bandwidth of flash memory interface, a multi-channel design of solid state storage device is adopted.The advantage of multi-channel flash memory is that multi-channel can operate in parallel and increase the read and write bandwidth of solid-state storage device.On the basis of analyzing the hardware architecture of multi-channel solid-state disk, the corresponding management system architecture is put forward, and the design and implementation of the solid-state disk storage system are completed, including the partition of system area and data area, queue management, buffer management, etc.Parallel storage management and flash conversion layer.The system realizes the parallel transmission of data through the parallel of multi-channel and income between channels, and effectively improves the speed of reading and writing of solid-state disk and the capacity of the system.Moreover, in order to connect seamlessly with the current mainstream interface, queue management is adopted, read and write queues are separated, execution queues and completion queues are designed.Data buffering strategy is included in the design of the system, which reduces the write operation of hot data to Flash, and improves the performance of reading and writing and the lifetime of Flash.In addition, the system sets up the Flash translation layer, completes the address mapping, garbage collection and so on. The address mapping of .Flash translation layer adopts the efficient page mapping method, because the page mapping method consumes more to the SDRAM,The mapping method based on load part call mapping table and two-level page mapping is proposed. Both of these two methods can effectively reduce the consumption of mapping table to SDRAM.Because the Flash controller is based on the EP2C35F484C6N FPGA of Altera, it belongs to the middle and low end FPGA, and the system has no operating system support.So the test performance of FTL layer is only 40% less than that of Flash controller.Under multi-channel architecture and management, the performance of read and write is doubled compared with single particle.
【学位授予单位】：华中科技大学
【学位级别】：硕士
【学位授予年份】：2012
【分类号】：TP333

【参考文献】