SoC中的伪双口RAM优化设计方法及应用

发布时间：2018-04-13 03:30

  本文选题：伪双口RAM + 单口RAM　； 参考：《计算机辅助设计与图形学学报》2017年02期

【摘要】：针对SoC中TP RAM的面积及功耗较大问题,提出一种优化设计方法.该方法将SoC中的TP RAM替换成SP RAM,并在SP RAM外围增加读写接口转换逻辑,使替换后的RAM实现原TP RAM的功能,以保持对外接口不变.将文中方法应用于一款多核SoC芯片,该芯片经TSMC 28 nm HPM工艺成功流片,die size为10.7 mm×11.9 mm,功耗为17.2 W.测试结果表明,优化后的RAM面积减少了24.4%,功耗降低了39%.
[Abstract]:In order to solve the problem of large area and power consumption of TP RAM in SoC, an optimal design method is proposed.In this method, TP RAM in SoC is replaced with SP RAM, and the conversion logic of read and write interface is added to the periphery of SP RAM, so that the replaced RAM can realize the function of original TP RAM so as to keep the external interface unchanged.The method is applied to a multi-core SoC chip. The chip is successfully fabricated by TSMC 28nm HPM process. The die size is 10.7mm 脳 11.9mm, and the power consumption is 17.2w.The test results show that the optimized RAM area is reduced by 24. 4 and the power consumption is reduced by 39.
【作者单位】： 西安培华学院中兴电信学院;西安电子科技大学宽禁带半导体材料与器件教育部重点实验室;
【基金】：国家自然科学基金(61376099,6143000024) 陕西省教育厅专项基金项目(16JK2138)
【分类号】：TP333
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本文编号：1742744