面向高性能计算的众核处理器结构级高能效技术

发布时间：2018-04-14 09:36

本文选题：众核处理器 + 结构优化　；参考：《计算机学报》2014年10期

【摘要】：随着半导体技术的进步,众核处理器已经广泛应用于高性能计算领域.而要构建未来高性能计算系统,处理器必须突破严峻的"能耗墙"挑战.文中以一款自主众核处理器DFMC原型为基础,首先对其在典型负载下的能耗分布进行了分析,结合该处理器的具体结构,提出了基于指令窗口的指令缓冲、操作数锁存两种结构级能效优化技术,探索了能效优先的浮点部件设计方法.实验表明,通过上述技术可以降低处理器取指和译码能耗约50%、寄存器文件能耗11.2%和浮点部件能耗17.6%,最终全芯片降低能耗约14.7%.在该文所述实验环境下,作者还进行了DFMC原型的双精度矩阵乘(DGEMM)性能功耗比测试,并与NVIDIA公司的Kepler K20GPU进行了对比.
[Abstract]:With the progress of semiconductor technology, multicore processors have been widely used in the field of high performance computing.In order to build high performance computing system in the future, the processor must break through the challenge of energy consumption wall.Based on the prototype of an autonomous multi-core processor (DFMC), the distribution of energy consumption under typical load is analyzed, and the instruction buffering based on instruction window is proposed according to the specific structure of the processor.The design method of floating-point parts with priority of energy efficiency is explored by two kinds of structure level energy efficiency optimization techniques of Operand latch.The experimental results show that the energy consumption of the processor can be reduced by 50%, the energy consumption of register files by 11.2% and the energy consumption of floating-point parts by 17.6%. Finally, the energy consumption of the whole chip can be reduced by about 14.775%.In the experimental environment described in this paper, the performance power ratio of DFMC prototype by double precision matrix multiplication (DGEMMMMM) is also tested and compared with that of Kepler K20GPU of NVIDIA Company.
【作者单位】：数学工程与先进计算国家重点实验室;国家并行计算机工程技术研究中心;
【基金】：国家“八六三”高技术研究发展计划重大项目基金(2014AA01A300) 国家“核高基”重大专项(2013ZX0102-8001-001-001)资助
【分类号】：TP332

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