基于闪存的高速PCIe固态存储卡的研究与实现

发布时间：2018-04-17 12:03

本文选题：闪存 + 多通道　；参考：《国防科学技术大学》2012年硕士论文

【摘要】：随着网络、计算、存储等技术的飞速发展，当今世界逐渐变成了网络的世界，数据的世界。以海量数据为基础的数据密集型计算应用的广泛出现，除了对存储规模的庞大需求以外，对性能、延迟、带宽、可靠性、能耗等方面的综合性存储服务能力也提出了更高的要求。传统磁盘设备因内部机械装置受限， I/O带宽已成为整个大规模存储系统的主要瓶颈。闪存已经以无可争辩的低价格、高性能、非易失、低功耗等特点在性能上已对磁盘形成优势。另外，若要使用固态硬盘组成大规模存储阵列，现有的几种传输信道根本无法满足带宽需求。而相较于SAS、SATA、FC、iSCSI等存储传输接口，PCIe具有更快的传输带宽，完全能满足大规模存储阵列的带宽要求。本文主要对基于闪存的高速PCIe固态存储卡进行了研究与实现，主要工作如下：首先，，本文研究了闪存的存储特性、芯片内部结构和接口，设计实现了闪存芯片控制器，使之能够正确访问闪存存储芯片。其次，本文对当前闪存控制器的研究现状进行了详尽分析，针对现有的闪存控制器对多通道和多die的并发性挖掘不够深入的问题，提出了两种闪存并行访问策略，并分别为之设计实现了闪存控制器。实验结果表明，在多通道策略下，4通道获得了2.1倍的加速比；采用乱序访问之后，单片4die的IO带宽利用率则达到了最少36%，最大167%的性能提升。最后，本文研究了当前主流存储传输接口的发展趋势，重点分析了PCIe总线接口的相关传输协议，并在事务层上对PCIe协议进行解析，设计实现了DMA控制器，从而实现主机与固态存储卡的数据传输。同时，本文以采用高速PCIe1.1×4接口的FPGA开发板为平台，使用三星公司的闪存芯片作为存储单元，设计实现了基于闪存的具有PCIe接口、总容量为256GB、读写实测性能分别达到700MB/S和600MB/s高速固态存储卡原型系统。
[Abstract]:With the rapid development of network, computing, storage and other technologies, today's world has gradually become the world of network, the world of data.The widespread emergence of data-intensive computing applications based on massive data, in addition to the huge demand for storage, performance, latency, bandwidth, reliability,Energy consumption and other aspects of the comprehensive storage service capacity also put forward higher requirements.Due to the limitation of internal mechanical devices, the I / O bandwidth of traditional disk devices has become the main bottleneck of the whole large-scale storage system.Flash memory has become an advantage over disk performance with indisputable features of low price, high performance, non volatile, low power consumption, etc.In addition, if the solid state hard disk is used to form a large storage array, the existing transmission channels can not meet the bandwidth requirements at all.Compared with the storage transport interface such as SASU SATAA FCU iSCSI, PCIe has faster transmission bandwidth and can meet the bandwidth requirements of large-scale storage arrays.In this paper, the high speed PCIe solid state memory card based on flash memory is studied and implemented. The main work is as follows:Firstly, the memory characteristics of flash memory, the internal structure and interface of flash memory are studied, and the controller of flash memory chip is designed and implemented so that it can access the memory chip correctly.Secondly, this paper makes a detailed analysis of the current research status of flash memory controller. Aiming at the problem that the existing flash memory controller is not deep enough to mine the concurrency of multi-channel and multi-, two parallel access strategies of flash memory are proposed.The flash memory controller is designed and implemented respectively.The experimental results show that the speedup ratio of 4 channels is 2.1 times under the multi-channel strategy, and the IO bandwidth utilization of monolithic 4die is at least 36%, with a maximum performance improvement of 167% after random access.Finally, this paper studies the development trend of current mainstream storage and transport interface, analyzes the related transport protocols of PCIe bus interface, analyzes the PCIe protocol on transaction layer, and designs and implements the DMA controller.Thus, the data transmission between host computer and solid state memory card is realized.At the same time, the FPGA development board with high speed PCIe1.1 脳 4 interface is used as the platform, the flash memory chip of Samsung is used as the memory unit, and the PCIe interface based on flash memory is designed and implemented.The total capacity is 256 GB. The performance of read and write is up to the prototype system of 700MB/S and 600MB/s high speed solid state memory card respectively.
【学位授予单位】：国防科学技术大学
【学位级别】：硕士
【学位授予年份】：2012
【分类号】：TP333

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