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基于快速原型的64位RISC-P架构处理器建模与验证

发布时间:2018-04-19 04:40

  本文选题:ADL + LISA ; 参考:《国防科学技术大学》2013年硕士论文


【摘要】:处理器建模在设计空间探索、软硬件协同验证、专用处理器设计等领域有着重要的作用。体系结构设计者需要对处理器多种体系结构进行评估,寻找目标需求和实现代价之间最佳平衡点,方便迅速地描述处理器体系结构模型是必经的途径;软件人员需要尽早地开发和调试配套软件,功能正确且完备的硬件模型是开发环境不可或缺的部分;验证人员需要从功能和性能等多个方面评价模型可用性与可实现性,灵活可修改的模型与基础工具链是必备的条件。因此,研究处理器的快速建模生成方法具有十分重要的意义。 某款高性能CPU经过多代发展已经积累了大量体系结构设计方案可供选择,出于未来高性能微处理器设计验证进度的考虑,使用快速验证原型能够在原型精确度与早期软件开发需求之间取得平衡。本课题针对该项目快速产生处理器模型和软件工具的需求展开研究与设计,以RISC-P体系结构模拟新处理器结构,课题的主要工作和研究成果包括以下几个方面: 1)课题综合参考多种RISC指令集的基础上自定义RISC-P指令集;指令类型涵盖数据处理类指令、分支指令、乘加类指令、访存类指令。然后,基于自定义指令集设计了64位RISC-P架构的微体系结构。 2)使用LISA语言描述了指令集精确和周期精确两种抽象级别的处理器模型。使用Processor Designer工具,基于周期精确的仿真模型,得到自定义指令的软件工具链、处理器RTL源码以及指令描述文档。然后,本课题使用DC工具在45nm工艺库下对RTL代码进行综合,模型运行频率为334MHz,功耗为25.9174681mW,面积为0.5894mm2。 3)遵循冗余验证的原则,本课题实现了基于PD平台的微处理器模型仿真与调试,基于生成的RTL代码软模拟逻辑验证和硬件加速器验证。两种途径均分为单条指令的测试和针对性测试程序测试两个步骤进行。多种方式结果证明基于快速原型方法的处理器模型能够取得模拟精度与架构调整灵活性的折中。 4)以片上存储器容量设计调整和增加分支预测部件为例,验证了快速原型方法能够灵活支持DSE。结合综合工具与厂商工艺库能够快速评估设计调整带来的面积、主频和功耗影响,同时体系结构模拟工具能够用于软件开发和特定软件应用性能评估。 基于自定义处理器体系结构资料,,课题以Processor Designer工具为基础探索了快速原型方法在微处理器设计与验证过程中的应用。试验过程与结果表明该方法能够支持快速设计建模、体系结构参数空间探索、软件应用功能验证和开发、以及物理设计性能评估。
[Abstract]:Processor modeling plays an important role in the field of design space exploration, hardware and software co-verification, dedicated processor design and so on.Architecture designers need to evaluate the processor architecture to find the best balance between the target requirements and the implementation cost, and describe the processor architecture model conveniently and quickly.Software personnel need to develop and debug the supporting software as soon as possible. A proper and complete hardware model is an indispensable part of the development environment, and verifiers need to evaluate the usability and realizability of the model from many aspects, such as function and performance, etc.Flexible modifiable models and basic tool chains are required.Therefore, it is of great significance to study the fast modeling generation method of processor.A certain high-performance CPU has accumulated a large number of architecture design schemes to choose from after many generations of development, considering the design verification progress of future high-performance microprocessors.Using rapid prototyping can strike a balance between prototype accuracy and early software development requirements.This topic aims at the requirement of the project to produce the processor model and software tools quickly, and simulates the new processor architecture with the RISC-P architecture. The main work and research results include the following aspects:The main contents are as follows: 1) the subject synthetically refers to various RISC instruction sets and customizes the RISC-P instruction set. The instruction type includes data processing instruction, branch instruction, multiplicative and additive instruction, memory access instruction.Then, a 64-bit RISC-P architecture is designed based on custom instruction set.2) the processor model of instruction set precision and periodic precision is described by using LISA language.Using the Processor Designer tool, the software tool chain, the processor RTL source code and the instruction description document are obtained based on the cycle precise simulation model.Then, the DC tool is used to synthesize the RTL code in the 45nm process library. The running frequency of the model is 334MHz, the power consumption is 25.9174681mW, and the area is 0.5894mm2.3) following the principle of redundancy verification, this paper realizes the simulation and debugging of microprocessor model based on PD platform, the software simulation logic verification based on generated RTL code and the verification of hardware accelerator.The two approaches are divided into two steps: single instruction test and targeted test program test.The results show that the processor model based on rapid prototyping method can achieve a compromise between simulation accuracy and flexibility of architecture adjustment.4) taking the design and adjustment of on-chip memory capacity and the addition of branch prediction components as examples, it is verified that the rapid prototyping method can support DSEs flexibly.The combination of integrated tools and vendor process libraries can quickly evaluate the impact of design adjustment on area, main frequency and power consumption, while architecture simulation tools can be used for software development and performance evaluation of specific software applications.Based on the data of custom processor architecture, this paper explores the application of rapid prototyping method in microprocessor design and verification based on Processor Designer tools.The experimental process and results show that this method can support rapid design modeling, architecture parameter space exploration, software application function verification and development, and physical design performance evaluation.
【学位授予单位】:国防科学技术大学
【学位级别】:硕士
【学位授予年份】:2013
【分类号】:TP332

【参考文献】

相关期刊论文 前2条

1 Dhanendra Jani;Steve Leibson;;Tensilica如何验证处理器核心[J];中国集成电路;2008年09期

2 严迎建;叶建森;刘军伟;徐劲松;;VLIW处理器ISA建模与辅助软件优化技术[J];计算机工程与设计;2009年11期



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