固态存储阵列关键技术研究

发布时间：2018-04-20 23:38

  本文选题：闪存 + PCI-E　； 参考：《国防科学技术大学》2013年硕士论文

【摘要】：近年来,闪存作为一种较为成熟的固态存储介质,具有速度高、体积小、重量轻、功耗低等优点,正逐步应用到企业级服务器和高性能计算领域,为高性能计算中存储系统性能的提高带来新的机遇和挑战。RAID(独立磁盘冗余阵列)是一种广泛应用的数据存储技术,它通过数据分割、并行访问提高性能,通过冗余纠错提高可用性和可靠性。基于闪存构建固态存储阵列是构建高性能、高可靠的大规模存储系统的有效途径之一,但将传统RAID机制直接应用于闪存存在小写问题突出、Flash芯片磨损不均衡等问题。为此,本文基于现有的闪存及闪存阵列技术,设计实现高性能、高可靠的固态存储阵列。本文主要工作包括以下几方面。(1)闪存技术与基于闪存的RAID机制研究。从闪存转换层FTL(Flash Translation Layer)和缓存管理两方面研究分析现有的闪存技术。分析总结基于闪存构建RAID的关键技术。(2)设计了一种基于PCI-E接口的嵌入式固态存储阵列卡。该阵列卡采用高速PCI-E接口与主机通信,同时设置16个通道并行管理64个闪存芯片,提供了比基于SAS或SATA接口的固态存储设备更高的性能和可靠性。采用基准测试程序对固态存储阵列卡进行了性能评测,实测最大I/O吞吐率达到524K(IOPS),最大I/O带宽达到2.83GB/s。(3)提出了一种基于缓存的可重组RAID机制。以新型非易失存储器SCM(Storage Class Mem ory)作为缓存,采用RAID重组思想,对缓存替换出的数据顺序重组RAID条带,克服了传统RAID机制的小写问题,提高了闪存阵列的性能和使用寿命,同时也解决了闪存阵列各芯片磨损不均衡的问题。模拟测试结果表明:可重组RAID机制有效减少了闪存阵列的读写响应时间、擦除操作次数,以及垃圾回收操作的频率。
[Abstract]:In recent years, flash memory, as a mature solid state storage medium, has the advantages of high speed, small volume, light weight and low power consumption. For improving the performance of storage system in high performance computing, it brings new opportunities and challenges. Raid (redundant Array of Independent disks) is a widely used data storage technology, which improves performance through data segmentation and parallel access. Improve availability and reliability through redundancy correction. Building solid state memory array based on flash memory is one of the effective ways to build high performance and high reliability large scale memory system. However, there are some problems such as low case problem in applying traditional RAID mechanism to flash memory, such as uneven wear and tear of flash chip. Therefore, based on the existing flash memory and flash memory array technology, a high performance and high reliability solid state memory array is designed and implemented in this paper. The main work of this paper includes the following aspects: flash memory technology and RAID mechanism based on flash memory. The existing flash memory technology is analyzed from FTL(Flash Translation layer and cache management. This paper analyzes and summarizes the key technology of constructing RAID based on flash memory. It designs an embedded solid-state memory array card based on PCI-E interface. The array card uses high speed PCI-E interface to communicate with the host computer and 16 channels to manage 64 flash memory chips in parallel. It provides higher performance and reliability than solid state storage devices based on SAS or SATA interface. The performance of the solid-state memory array card is evaluated by using the benchmark program. The measured maximum I / O throughput is 524kg IOPS and the maximum I / O bandwidth is 2.83GB / s. 3) A buffer based reconfigurable RAID mechanism is proposed. A novel non-volatile memory (SCM(Storage Class Mem memory) is used as the cache. The RAID bands are reorganized in the order of the data replaced by the cache by using the RAID recombination idea, which overcomes the lowercase problem of the traditional RAID mechanism and improves the performance and service life of the flash memory array. At the same time, the problem of uneven wear of flash memory array chips is also solved. The simulation results show that the reconfigurable RAID mechanism can effectively reduce the read / write response time of flash memory array, the number of erasure operations, and the frequency of garbage collection.
【学位授予单位】：国防科学技术大学
【学位级别】：硕士
【学位授予年份】：2013
【分类号】：TP333
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本文编号：1779989