基于FPGA的PCM并行控制器设计

发布时间：2018-04-25 06:54

本文选题：FPGA + 相变存储器　；参考：《山东大学》2013年硕士论文

【摘要】：相变存储器(Phase Change Memory)简称PCM,是一种新型的非易失性存储器,其具有诸多优秀性能,是未来计算机应用中闪存的最佳替代品,具有不可估量的发展前景。PCM掉电不丢失数据,存储时间长,工作功耗低,而且相对于闪存,PCM在编程(写数据)前不需要进行擦除操作,支持对每一个存储单元的随机读写,其读写速度也高于闪存,每个PCM存储单元的可编程次数也远超过闪存。根据科学界估计,未来PCM的读写速度和可编程次数将逐渐接近甚至超过DRAM存储器。因此,电子行业对PCM的需求增长迅速,固态硬盘、手机ROM等存储设备开始逐渐使用PCM作为其存储介质。与闪存一样,PCM在普及应用的过程中不但需要制造工艺的提升和硬件设计的完善,还需要高效的软件模块进行管理和控制。本文根据PCM的特性和实际需求,设计了PCM并行控制器,并在FPGA中以Verilog HDL语言编程实现,最终应用于国家863项目“面向大数据的先进存储结构及关键技术”的子包“基于新型非易失性存储器的。统一内外存’系统结构及其关键技术”项目的统一内外存实现中。首先,本文根据对PCM的属性归纳和PCM与其他存储器的比较结果,结合各种计算机系统对PCM的功能要求,分析了PCM并行控制器的系统功能性需求和非功能性需求,确定了本系统的主要功能目标和解决的问题,即控制PCM并与用户相连接,实现和优化用户与PCM之间的通信。本文以用例图等辅助说明了系统的需求分析。其次,本文在需求分析基础上对PCM并行控制器进行了系统架构设计。本文根据系统的功能需求提出了系统设计目标和原则,并据此分别对系统的技术架构和功能架构进行了设计。主要设计了用户接口模块、页表管理模块、分页机制模块、损耗均衡模块、错误校验模块、坏页管理模块和PCM接口模块等功能模块,以达到将PCM接口转换为用户接口并控制PCM高效安全的存储用户数据的目标。本文还结合系统流程图等说明了PCM并行控制器的工作原理等。再次,本文根据上述工作进行了PCM并行控制器的系统详细设计,完成了系统建模,结合类图等说明了本系统的静态结构,介绍了各个功能模块之间的关系和静态建模,随后结合系统状态图等描述本系统的动态结构,从读操作和写操作两方面分析了系统的运行路线和各个模块之间的动态关系。本文还结合模块状态图等说明了各个模块的详细设计和整个系统的具体工作流程。最后,本文根据对PCM并行控制器的详细设计简单说明了各个模块的实现,介绍了本系统的物理模型,详细解释了页表管理模块和损耗均衡模块中的地址映射、区域外更新和页间动态替换等算法实现,以及错误校验模块中的ECC校验算法实现,并描述了移植了本系统的PCM开发板。本文还介绍了PCM并行控制器的测试环境,对本系统进行了测试和验证,并对测试结果进行了分析。本文结尾总结了PCM并行控制器的功能和实现,以及目前各种计算机系统与本系统的兼容和匹配,并展望了PCM应用的发展方向。综上所述,本文分析了计算机系统对存储设备的需求和PCM的属性,并在此基础上设计和实现了PCM并行控制器。
[Abstract]:Phase Change Memory (Memory), short for PCM, is a new nonvolatile memory. It has many excellent performances and is the best substitute for flash memory in future computer applications. It has an immeasurable prospect of developing.PCM power loss without losing data, long storage time, low power consumption, and PCM programming (write number) relative to flash memory According to scientific circles, the reading and writing speed and programmable times of PCM will gradually approach or even exceed the DRAM memory. Therefore, the electronic industry is to PC. The demand for M is growing rapidly, and the storage devices such as solid state hard disk and mobile phone ROM are gradually using PCM as its storage medium. As with flash memory, PCM needs not only the improvement of manufacturing process and the perfect hardware design, but also the efficient software modules for management and control in the process of universal application. This article is based on the characteristics and actual requirements of PCM. The PCM parallel controller is designed and implemented in FPGA with Verilog HDL language. It is finally applied to the unified internal and external implementation of the sub package of the National 863 project "the advanced storage structure and key technology for large data", which is based on the new non-volatile memory.
First, based on the attribute induction of PCM and the comparison between PCM and other memory, and combining the functional requirements of various computer systems to PCM, this paper analyzes the functional requirements and non functional requirements of the PCM parallel controller, and determines the problem of the main function target of this system, that is, to control the PCM and to connect with the user. The communication between users and PCM is optimized. The requirement analysis of the system is illustrated by use case diagram.
Secondly, the system architecture of PCM parallel controller is designed on the basis of demand analysis. According to the functional requirements of the system, the objectives and principles of the system design are put forward. According to this, the technical architecture and functional framework of the system are designed respectively. The main design is the user interface module, page table management module and paging mechanism module. The loss balance module, error check module, bad page management module and PCM interface module are used to achieve the goal of converting PCM interface into user interface and controlling PCM efficient and secure storage of user data. This paper also illustrates the working principle of PCM parallel controller in combination with system flow chart.
Thirdly, according to the above work, the detailed design of the PCM parallel controller is carried out, the system modeling is completed, the static structure of the system is explained with the class diagram, the relationship and static modeling of various functional modules are introduced. Then the dynamic structure of the system is described with the state diagram of the system, from the read operation and the write operation two. The operation route of the system and the dynamic relationship between each module are analyzed. The detailed design of each module and the specific work flow of the whole system are illustrated in this paper.
Finally, according to the detailed design of the PCM parallel controller, the realization of each module is simply explained, the physical model of the system is introduced, the address mapping in the page management module and the loss balance module, the updating of the area and the dynamic replacement between the pages, and the ECC verification algorithm in the error checking module are explained in detail. At present, the PCM development board which has been transplanted in this system is described. The test environment of the PCM parallel controller is introduced in this paper, and the system is tested and verified, and the test results are analyzed.
At the end of this paper, the function and implementation of PCM parallel controller are summarized, as well as the compatibility and matching of various computer systems with this system at present, and the development direction of the PCM application is also prospected.
To sum up, this paper analyzes the requirements of computer system for storage devices and the properties of PCM, and designs and implements PCM parallel controller on this basis.

【学位授予单位】：山东大学
【学位级别】：硕士
【学位授予年份】：2013
【分类号】：TP311.52;TP333

【参考文献】