分栅快闪存储器的失效机理及性能提升方法研究
发布时间:2018-04-30 13:17
本文选题:分栅快闪存储器 + 擦除 ; 参考:《复旦大学》2012年硕士论文
【摘要】:作为非易失性半导体储器的类型之一,分栅快闪存储器具有高编程效率、低擦除电压和无过擦除效应的优点,因此外围控制电路简单。自发明以来,它已在低密度代码存储和嵌入式闪存领域得到了广泛的应用。由于分栅闪存产品的制造过程需要同时完成闪存单元和逻辑器件的集成,制造工艺相对复杂,工程师需要及时地根据闪存产品的良率反馈和失效原因作出制程的优化和改进,因此对分栅闪存的失效机理进行研究具有重要的意义。 本文介绍了0.18μm自对准分栅闪存的器件结构、工作原理、闪存单元的制造流程和测试流程,通过对分栅闪存不同失效类型的电性数据的分析,对所发生的常见失效(擦除、编程和编程串扰失效)进行了分类和归纳,同时结合分栅闪存的擦除和编程模型,对不同的失效机理进行了分析,并借助物理失效分析结果进行了证实。 由于分栅闪存的编程和编程串扰的工作窗口之间存在着相互制约的关系,本文提出了一种评估闪存产品编程工作窗口的方法。以此为基础,通过VSS IMP实验对某闪存产品的编程工艺窗口进行了优化和改善。在客户不愿改变闪存产品测试条件的情况下,通过实验手段,找到了最佳的VSS IMP1/2掺杂浓度参数,使闪存产品的编程工作窗口尽量与测试条件相匹配,从而扩大了产品的工艺窗口,稳定了产品良率。
[Abstract]:As one of the types of non - volatile semiconductor memory devices , the split - gate flash memory has the advantages of high programming efficiency , low erasing voltage and no over - erase effect , so that the peripheral control circuit is simple . Since the manufacturing process of the split - gate flash memory product needs to complete the integration of the flash memory unit and the logic device at the same time , the manufacturing process is relatively complex , the engineer needs to make the optimization and improvement of the process according to the good rate feedback and the failure cause of the flash memory product , and therefore , the research on the failure mechanism of the split - gate flash memory is important .
This paper introduces the device structure , working principle , manufacturing flow and test flow of 0.18 渭m self - aligned split - gate flash memory . Through the analysis of the electrical data of different failure types of the split - gate flash memory , the common failures ( erase , programming and programming crosstalk failure ) have been classified and summarized . At the same time , the erase and programming model of the split - gate flash memory is combined to analyze the different failure mechanisms , and the results of the physical failure analysis are verified .
This paper presents a method for evaluating the programming process window of a flash memory product due to the mutual restriction between the programming of the split - gate flash memory and the working window of programming crosstalk . In this paper , the optimization and improvement of the programming process window of a flash memory product is presented by using the VSS IMP experiment . In the case of the customer unwilling to change the test conditions of the flash memory product , the optimal VSS IMP1 / 2 doping concentration parameter is found through the experiment method , so that the program working window of the flash memory product is matched with the test condition as much as possible , thereby enlarging the process window of the product and stabilizing the product yield .
【学位授予单位】:复旦大学
【学位级别】:硕士
【学位授予年份】:2012
【分类号】:TP333
【参考文献】
相关博士学位论文 前1条
1 陶凯;先进分栅闪存器件集成制造的整合与优化[D];中国科学院研究生院(上海微系统与信息技术研究所);2006年
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