高可靠性星载多处理器计算机设计

发布时间：2018-05-03 07:24

本文选题：高可靠性 + 星载计算机　；参考：《南京理工大学》2013年硕士论文

【摘要】：空间技术的发展是国家科技水平和综合国力的重要体现,对国家的经济、国防和军事建设有着重大影响。随着我国空间探索脚步的不断前进,宇航任务对星载计算机提出了更高的要求。空间环境的恶劣条件,对星载电子产品的性能、可靠性、寿命提出了严重的挑战,亟需研发出适应未来空间飞行任务需要的高性能、高可靠的星载计算机。本文以航天器高级电子系统技术研究项目为背景,研究符合高级电子系统规范的星载容错计算机体系结构,针对性的提出多处理器模块并行冗余工作的计算机系统架构。在此基础上,研究基于高速串行数据传输实现的重定向系统,实现处理器与接口电路的切换互连以及多个处理器之间的数据交互设计,研究串行传输的时钟同步系统实现方法。根据任务特点,提出了在子计算单元故障或者数据传输通道故障情况下的系统重构策略。在完成架构设计和重定向系统研究的基础上,详细阐述了星载容错计算机的电路设计。文中对基于重定向互连的串行传输延时进行分析计算,完成了同步时钟系统的相位校准测试和信号电气特性测试,已验证设计方法和电路实现的正确性。
[Abstract]:The development of space technology is an important embodiment of national science and technology level and comprehensive national strength, and has a great influence on the national economy, national defense and military construction. With the continuous progress of space exploration in our country, the space mission has put forward higher requirements to the spaceborne computer. The bad conditions of space environment pose a serious challenge to the performance, reliability and lifetime of spaceborne electronic products. It is urgent to develop a high performance and reliable spaceborne computer to meet the needs of future space missions. In this paper, based on the research project of spacecraft advanced electronic system technology, the architecture of onboard fault-tolerant computer, which conforms to the specification of advanced electronic system, is studied, and a multi-processor module parallel redundant computer system architecture is proposed. On this basis, the redirect system based on high speed serial data transmission is studied, which realizes the switch and interconnection between processor and interface circuit and the design of data interaction between several processors. The realization method of clock synchronization system for serial transmission is studied. According to the characteristics of the task, the system reconstruction strategy in the case of sub-computing unit failure or data transmission channel failure is proposed. Based on the research of architecture design and redirection system, the circuit design of onboard fault-tolerant computer is described in detail. In this paper, the serial transmission delay based on redirect interconnection is analyzed and calculated, and the phase calibration test and the signal electrical characteristic test of the synchronous clock system are completed. The correctness of the design method and the circuit implementation is verified.
【学位授予单位】：南京理工大学
【学位级别】：硕士
【学位授予年份】：2013
【分类号】：TP303;V446

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