三值量子可逆逻辑电路的研究与设计

发布时间：2018-05-07 22:30

本文选题：量子计算机 + 三值量子系统　；参考：《东华大学》2017年硕士论文

【摘要】：量子逻辑系统分为二值量子系统和多值量子系统,目前对多值量子系统的研究甚少,但多值量子系统在信息安全、编码量子位等方面都优于二值量子系统,所以未来往多值量子系统发展是一种趋势。三值量子系统作为多值量子系统的最小情况,具有重要的研究意义,从已有的三值量子逻辑电路的研究成果中可以发现,研究者对于三值量子逻辑电路的研究大多侧重于综合方法,而对其优化方法的研究较少,因此,本文对三值量子逻辑电路的优化设计进行了研究,具体研究内容如下:(1)提出并证明了14条三值量子逻辑电路优化规则。根据三值量子基本门级联的特性,总结出14条优化规则,这些优化规则适用于大多数三值量子逻辑电路,可以有效的优化由三值Toffoli门、三值Feynman门、三值M-S门构成的三值量子逻辑电路。(2)设计出了三值量子逻辑电路优化算法。基于上述的14条优化规则,设计出了三值量子逻辑电路优化算法,然后使用C语言在VC++6.0环境下对该算法进行了编程实现,以便当三值量子逻辑电路的输入位数和门数过多时,仍能参照本文设计的14条优化规则去优化电路。(3)实现了三值量子全加器、全减器、加减器的优化设计。依次对n位三值量子全加器、全减器、加减器进行了人工设计,再使用上述的优化算法对电路进行改良,改良后的电路与目前已见报道的同类型电路相比,量子代价和辅助线都是最少的,是当前该类型电路的最优设计,对三值量子逻辑电路的设计有启发作用,也进一步证明了本文设计的优化规则及优化算法的实用性。(4)实现了三值量子乘法器的优化设计。目前尚未见到有使用三值Toffoli门、三值Feynman门及三值M-S门设计的三值量子乘法器的报道,因此,本文设计出了一位三值量子乘法器的电路并利用上述优化算法对电路进行改进,最后基于常规逻辑的阵列乘法器组成原理设计出了n×n位三值量子乘法器,为三值量子逻辑电路的设计提供参考。
[Abstract]:Quantum logic system is divided into binary quantum system and multivalued quantum system. At present, there is little research on multivalued quantum system, but multivalued quantum system is superior to binary quantum system in information security, coding quantum bit and so on. Therefore, the future development of multivalued quantum systems is a trend. Ternary quantum systems, as the minimum case of multivalued quantum systems, are of great significance in the study of ternary quantum logic circuits. Most of the researches on ternary quantum logic circuits are focused on synthesis methods, but few on their optimization methods. Therefore, the optimization design of ternary quantum logic circuits is studied in this paper. The main contents of this paper are as follows: (1) the optimization rules of 14 ternary quantum logic circuits are proposed and proved. According to the characteristics of ternary quantum basic gate cascade, 14 optimization rules are summarized. These optimization rules are suitable for most ternary quantum logic circuits, and can be effectively optimized by ternary Toffoli gate and ternary Feynman gate. The ternary quantum logic circuit composed of ternary M-S gate is designed and the optimization algorithm of ternary quantum logic circuit is designed. Based on the above 14 optimization rules, a ternary quantum logic circuit optimization algorithm is designed, and the algorithm is programmed in VC 6.0. When the number of input bits and gates of ternary quantum logic circuits is too many, the optimal design of ternary quantum total adder, total subtracter and subtractor can still be realized by referring to the 14 optimization rules designed in this paper. The n-bit ternary quantum total adder, full subtracter and subtractor are designed manually, and then the circuit is improved by using the above optimization algorithm. The improved circuit is compared with the same type of circuit that has been reported at present. The quantum cost and auxiliary line are the least, which is the optimal design of the current type of circuit, which is instructive to the design of ternary quantum logic circuit. It is further proved that the optimization rules and the practicability of the optimization algorithm are used to realize the optimal design of the ternary quantum multiplier. There are no reports of ternary quantum multiplier designed by ternary Toffoli gate, ternary Feynman gate and ternary M-S gate. Therefore, a ternary quantum multiplier circuit is designed and improved by using the above optimization algorithm. Finally, an n 脳 n bit ternary quantum multiplier is designed based on the principle of array multiplier of conventional logic, which provides a reference for the design of ternary quantum logic circuit.
【学位授予单位】：东华大学
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：TP331;O413

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