基于Zynq的PCI Express接口设计与实现

发布时间：2018-05-11 04:18

  本文选题：PCI + Express接口　； 参考：《控制工程》2017年08期

【摘要】：针对PCI Express接口的FPGA中基于HDL状态机的传统设计方法中效率低下和复杂度高等不足,探讨一种SOPC中基于IP核的嵌入式设计方法,提出基于Xilinx最新Zynq平台PCI Express接口设计方案。在Zynq芯片的PL部分实现PCI Express接口模块、AXI-Stream和AXI的协议转换以及动态地址转换,PS部分实现AXI数据接口和DDR3接口模块,利用AXI互联器实现PL和PS中主从设备的通信。通过运行编写的顶层测试文件得到仿真波形,以及利用逻辑诊断IP核捕捉测试程序运行时的数据信号,实现对接口设计的验证。在设计效率提升时降低其复杂度,具有集成度高、可移植性强和通用性好等特点,为PCB IC芯片间、功能模块背板总线或光纤设备传输中的数据通信接口提供了一种解决方案。
[Abstract]:Aiming at the low efficiency and high complexity of the traditional design method based on HDL state machine in FPGA with PCI Express interface, this paper discusses an embedded design method based on IP core in SOPC, and proposes a design scheme of PCI Express interface based on the latest Zynq platform of Xilinx. In the PL part of Zynq chip, the protocol translation between PCI Express interface module, AXI-Stream and AXI, and the dynamic address translation module, AXI data interface and DDR3 interface module are realized, and the communication between PL and PS main and slave devices is realized by AXI interconnecting device. The simulation waveform is obtained by running the top-level test file and the data signal of the test program is captured by using the logic diagnostic IP core to verify the design of the interface. With the advantages of high integration, high portability and good versatility, the design efficiency is reduced when the design efficiency is improved. It provides a solution for the data communication interface between PCB IC chips, the functional module backplane bus or the optical fiber device transmission.
【作者单位】： 中南大学信息科学与工程学院;
【基金】：国家863计划项目“大规模PLC研发及应用”(2013AA040301-3)
【分类号】：TP334.7
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本文编号：1872379