基于FPGA与DDR2的视频缓存器设计与实现

发布时间：2018-05-20 01:28

本文选题：边缘调制器 + FPGA　；参考：《成都理工大学》2012年硕士论文

【摘要】：随着信息技术的不断发展，嵌入式系统被应用于越来越广泛的领域。在视频系统中高速大容量缓存器被广泛应用，然而专用高速大容量的缓存芯片价格过于昂贵，传统存储媒介在带宽上已经逐渐无法满足使用要求，特别是对于海量多路数据多进多出时性能上更加难以得到保障。近几年以来随着数字电视技术的不断发展，大量的数据需要传播。所以在使用视频系统进行数据处理时，就需要能在容量和速度上与之相适应的存储器作为高速海量缓存的载体。因为FPGA能进行现场设计且设计的灵活性强，而DDR2SDRAM有着存储速度快、存储容量大以及价格便宜的优势，所以两者已经被广泛的应用于各个领域，而在视频系统的设计应用中也越来越多的受到了关注。本文主要研究了基于FPGA和DDR2SDRAM的高速视频缓存技术，为高速多通道的存储设计提出了新的思路。在本论文里首先介绍了IPQAM系统的相关研究情况，并对FPGA和DDR2SDRAM工作特性、功能、设计要求逐一阐述，然后通过对Xilinx公司的FPGA和DDR2SDRAM存储原理的研究，提出了能够应用于IPQAM系统的改进型MIMO结构的视频存储方案，，满足了多通道数据存储的指标要求。本文利用FPGA和DDR2SDRAM存储器件实现了多路数据多进多出的存储方案，并可以应用在基于DVB-C的IPQAM调制器系统中，满足其高速、海量、多通道存储的要求。并通过Xilinx的Spartan3FPGA器件实现了DDR2内存接口的控制。通过使用Xilinx提供的DDR2IP核和参考用例，大大降低了接口设计的难度并且提高了整个设计的可靠性。在本设计中已对所有单元模块进行了设计、编程并经过了仔细的功能仿真和时序分析，测试结果表明整个设计达到了系统要求，确保了缓存器在IPQAM系统中的工作可靠性。取得的具体成果如下： (1)在FPGA的核心逻辑设计中，采用了无线通信系统中的多径传输理论对系统总体架构进行设计。 (2)本设计实现了一种具有FIFO特性的存储介质接口装置，便捷了对复杂时序接口的大容量、多通道、高速存储介质的应用。 (3)本设计满足了IPQAM设备中对于数据存储的要求，实现了消除视频信号网络抖动的目的。
[Abstract]:With the development of information technology, embedded system is applied in more and more fields. High-speed and high-capacity buffers are widely used in video systems. However, the cost of dedicated high-speed and high-capacity buffer chips is too high, the traditional storage media has been unable to meet the requirements in bandwidth. Especially, it is more difficult to guarantee the performance of mass multiplex data when multi-input and multi-output. In recent years, with the development of digital television technology, a large number of data need to be disseminated. Therefore, when we use video system to process data, we need the memory which can adapt to the capacity and speed as the carrier of mass cache. Because FPGA can carry out field design and design flexibility, and DDR2SDRAM has the advantages of high storage speed, large storage capacity and low price, both of them have been widely used in various fields. More and more attention has been paid to the design and application of video system. This paper mainly studies the technology of high-speed video cache based on FPGA and DDR2SDRAM, and puts forward a new idea for the design of high-speed multi-channel storage. In this paper, we first introduce the research situation of IPQAM system, and describe the working characteristics, functions and design requirements of FPGA and DDR2SDRAM one by one, and then through the research of FPGA and DDR2SDRAM storage principle of Xilinx Company. A video storage scheme based on improved MIMO structure for IPQAM system is proposed, which meets the requirements of multi-channel data storage. In this paper, FPGA and DDR2SDRAM memory devices are used to realize multi-channel data multi-input and multi-output storage, which can be applied to IPQAM modulator system based on DVB-C, which can meet the requirements of high-speed, massive and multi-channel storage. The control of DDR2 memory interface is realized by Spartan3FPGA device of Xilinx. By using the DDR2IP core and reference case provided by Xilinx, the difficulty of interface design is greatly reduced and the reliability of the whole design is improved. In this design, all the unit modules have been designed and programmed, and after careful functional simulation and timing analysis, the test results show that the whole design meets the requirements of the system and ensures the reliability of the buffer in the IPQAM system. The following concrete results have been achieved: In the core logic design of FPGA, the multipath transmission theory in wireless communication system is adopted to design the overall architecture of the system. In this paper, a storage medium interface device with FIFO characteristics is designed and implemented, which facilitates the application of large capacity, multi-channel and high speed storage media to complex sequential interfaces. The design meets the requirement of data storage in IPQAM equipment and realizes the purpose of eliminating the network jitter of video signal.
【学位授予单位】：成都理工大学
【学位级别】：硕士
【学位授予年份】：2012
【分类号】：TP333;TN791

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