基于FPGA的管道内检测器数据采集存储系统设计

发布时间：2018-05-29 03:10

本文选题：管道内检测器 + FPGA　；参考：《天津大学》2012年硕士论文

【摘要】：管道运输作为一种安全、经济运输方式,被我国广泛应用于天然气、石油等能源的运输。由于长时间的介质腐蚀和磨损,运输管道会出现一定程度的损伤,甚至可能发生重大的泄漏事故。而管道运输的安全关系着国家的经济及财产的安全,所以针对这种情况,管道内检测器的研究及发展就显得尤为重要起来。本文针对漏磁管道内检测器,采用当今发展迅速的FPGA,利用其高速的并行处理能力,设计实现管道内检测数据的高速并行采集和存储。首先,根据管道内检测器的外部结构,规划出数据采集和存储系统的总体设计方案,包括前端数据采集单元、中端数据传输单元和后端数据存储单元;然后,根据系统的设计方案,介绍了系统中FPGA的选型、PCI接口实现方式、主控单片机的功能及电路、温度记录功能、姿态记录功能以及FPGA的供电模块设计和DCDC系统电源转换模块的选择,系统地说明了系统中各功能的硬件实现方案。根据本系统的硬件设计,利用VerilogHDL语言编写了包括集束器端FPGA和主控FPGA的各种接口模块逻辑及缓存模块逻辑,实现了16-5路SPI数据并行接收,5路LVDS串行收发器高速串行传输以及基于PCI9054的FPGA与PC104的PCI接口通讯,并根据接口协议之间不同的数据位宽或读写速度,结合乒乓操作等逻辑设计技巧,设计了相应的缓存模块,实现了不同接口之间的数据无缝缓冲。针对系统中存在差分信号传输、PCI接口传输等相对复杂的PCB设计,分析讨论了LVDS差分信号传输线及PCI接口信号传输线的PCB设计方法;根据系统结构,设计了集束器FPGA板卡、主控FPGA和上下连接信号板卡的PCB图。最后,对集束器FPGA与主探头之间的SPI传输、主控FPGA与PC104之间的PCI传输进行了硬件上的逻辑验证,验证了系统数据传输的可靠性,证明了FPGA实现高速数据采集存储系统的可行性。
[Abstract]:As a safe and economical transportation mode, pipeline transportation is widely used in natural gas, petroleum and other energy transportation in China. Due to the corrosion and wear of medium for a long time, the transportation pipeline will be damaged to some extent, and even a serious leakage accident may occur. The safety of pipeline transportation is related to the national economy and property safety, so the research and development of pipeline detector is particularly important. In this paper, the high speed parallel acquisition and storage of the detection data in the pipeline is designed and realized by using the high speed parallel processing ability of FPGA, which is a rapidly developing FPGA. for the inner detector of magnetic flux leakage pipeline. Firstly, according to the external structure of the detector in the pipeline, the overall design scheme of the data acquisition and storage system is designed, including the front-end data acquisition unit, the mid-end data transmission unit and the back-end data storage unit. According to the design scheme of the system, this paper introduces the implementation mode of FPGA interface, the function and circuit of the main control MCU, the function of temperature record, the function of attitude record, the design of power supply module of FPGA and the choice of power conversion module of DCDC system. The hardware implementation scheme of each function in the system is explained systematically. According to the hardware design of the system, various interface module logic and buffer module logic including FPGA and FPGA are programmed by VerilogHDL language. The high speed serial transmission of 16-5 SPI data parallel receiving and 5-channel LVDS serial transceiver and the PCI interface communication between FPGA and PC104 based on PCI9054 are realized, and according to the different data bit width or read / write speed between the interface protocols, Combined with the logic design techniques such as ping-pong operation, the corresponding buffer module is designed to realize the seamless data buffering between different interfaces. In view of the relatively complex PCB design such as differential signal transmission and PCI interface transmission in the system, the PCB design method of LVDS differential signal transmission line and PCI interface signal transmission line is analyzed and discussed, and the FPGA card of the concentrator is designed according to the structure of the system. Main control FPGA and up and down connection signal board PCB diagram. Finally, the hardware logic verification of the SPI transmission between the FPGA and the main probe and the PCI transmission between the main control FPGA and the PC104 is carried out, the reliability of the system data transmission is verified, and the feasibility of realizing the high-speed data acquisition and storage system by FPGA is proved.
【学位授予单位】：天津大学
【学位级别】：硕士
【学位授予年份】：2012
【分类号】：TP333;TE973.6

【参考文献】