基于通用多核处理器的SandwichNP设计与实现

发布时间：2018-05-29 21:58

本文选题：网络处理器 + 处理模型　；参考：《国防科学技术大学》2012年硕士论文

【摘要】：随着互联网用户的急剧增长以及互联网应用的快速发展，现有的互联网面临着两方面的问题：一是现有的骨干网络链路带宽已经达到100Gbps的速度，要求路由器能够提供与之相匹配的高性能报文转发。二是随着P2P、电子商务、证券电子化交易的不断发展和完善，在网络边缘路由器中需要对大量的分组报文进行诸如加解密、流量整形、报文保序等一系列深度处理。目前基于通用多核CPU的网络处理器是业界研究的热点，它将通用多核处理器和报文处理硬件加速引擎相结合，同时实现了报文的高速转发及深度处理。多核多线程处理能够很好的隐藏软件DRAM访问延迟并提供控制平面所需的高度编程灵活性。网络加速引擎可以利用硬件的快速及并行特点，对实现了报文处理的快速路径。然而，通用多核网络处理器面临着系统软硬件I/O交互延迟较大的缺陷，限制了自身报文处理性能的提高。针对这一问题，，本文通过改进了原有基于通用多核网络处理器的处理模型及访存模型，提出了一种新型的基于通用多核的网络处理器实现模型—Sandwich。主要工作和创新点包括： 1.深入分析了专用网络处理器[2]及通用多核网络处理器[1]的组成结构及特点，将二者的报文处理模型和访存模型进行了比较，认识到通用多核网络处理器的性能瓶颈所在。Sandwich实现模型提出的报文处理模型能够最大限度的减少报文处理过程中的软硬件通信开销，且大大减轻了软件处理部分的负载。访存模型能够加速CPU对DRAM的访问速度，并通过对整个报文的深度处理实现灵活的控制平面。 2.设计了FIB查表[4][5][7]过程在SandwichNP上的映射算法，将整个查表周期分为三个阶段，分别映射到SandwichNP的输入加速、软件处理、输出加速模块中。算法中每次报文查表最多只需要一次软件内存访问即可完成，且多线程处理能够进一步隐藏查表时延。空间效率上看，软硬件以极低的存储开销支持了大规模的核心路由器转发表，且即使转发表规模快速增长也不会增加过多的额外存储开销。 3.在SandwichNP原型系统—GalaxyNP上实现了如上的Fib查表算法，并测得了真实网络环境下的多线程报文I/O速率及报文转发速率，实验结果表明基于Sandwich的报文转发速率及报文I/O速率能够在任何参数设定下保持一致，并且随着网络链路带宽的速度增长而增长，能够保证多端口的10Gbps速率下的报文线速转发。综上所述，本文针对通用多核网络处理器报文处理所面临的问题，提出了一种新型网络处理器实现模型—Sandwich，该模型已经成功应用于基于自主CPU构建的通用多核网络处理器平台上，其研究成果对提高通用多核网络处理器的报文处理性能有一定的理论意义和实用价值。
[Abstract]:With the rapid growth of Internet users and the rapid development of Internet applications, the existing Internet is facing two problems: first, the existing backbone network link bandwidth has reached the speed of 100Gbps. Routers are required to provide matching high performance packet forwarding. Second, with the development and perfection of P2P, E-commerce and electronic securities trading, a series of advanced processing such as encryption and decryption, traffic shaping, message preservation and so on are needed in network edge routers. At present, the network processor based on general-purpose multi-core CPU is a hot topic in the industry. It combines the general-purpose multi-core processor with the packet processing hardware acceleration engine, and realizes the high-speed forwarding and deep processing of packets. Multi-core multithreading can hide the software DRAM access delay and provide high programming flexibility for the control plane. The network acceleration engine can take advantage of the fast and parallel characteristics of hardware to realize the fast path of packet processing. However, the general-purpose multicore network processor is faced with the disadvantage of large I / O interaction delay between hardware and software of the system, which limits the improvement of its packet processing performance. In order to solve this problem, this paper improves the processing model and memory access model based on general-purpose multi-core network processor, and proposes a new implementation model of network processor based on general-purpose multi-core network processor-Sandwich. Key areas of work and innovation include: 1. In this paper, the structure and characteristics of special network processor [2] and general multi-core network processor [1] are analyzed, and their message processing models and memory access models are compared. It is recognized that the packet processing model proposed by the performance bottleneck of the universal multi-core network processor. Sandwich implementation model can minimize the communication overhead between hardware and software in the process of packet processing and greatly reduce the load of the software processing part. The memory access model can accelerate the access speed of CPU to DRAM and realize the flexible control plane through the deep processing of the whole message. 2. The mapping algorithm of FIB lookup table [4] [5] [7] process on SandwichNP is designed. The whole lookup period is divided into three stages: input acceleration, software processing and output acceleration module of SandwichNP. In the algorithm, only one software memory access is required for every packet search, and multithread processing can further hide the lookup delay. In terms of spatial efficiency, hardware and software support large scale core router forwarding tables with very low storage overhead, and even if the forwarding table scale grows rapidly, it will not add too much extra storage overhead. 3. The above Fib lookup algorithm is implemented on the SandwichNP prototype system -Galaxy NP, and the I / O rate and the forwarding rate of multithreaded packets in real network environment are measured. The experimental results show that the packet forwarding rate and the I / O rate based on Sandwich can be consistent under any parameter setting, and increase with the increase of the network link bandwidth, which can guarantee the transmission of the line rate of the packet at the 10Gbps rate of multiple ports. To sum up, this paper aims at the problem of message processing in general multi-core network processor. A new network processor implementation model, -Sandwich, is proposed. The model has been successfully applied to a general multi-core network processor platform based on autonomous CPU. The research results have certain theoretical significance and practical value for improving the packet processing performance of universal multi-core network processors.
【学位授予单位】：国防科学技术大学
【学位级别】：硕士
【学位授予年份】：2012
【分类号】：TP332

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