嵌入式系统中低功耗可重构Cache分析与设计

发布时间：2018-06-10 07:07

本文选题：低功耗 + 高速缓存　；参考：《湖南大学》2013年硕士论文

【摘要】：电子工艺技术的迅猛发展大大提高了处理器的集成度和工作速度，虽然性能得到大幅度的提升，但处理器功耗也迅速增加。功耗增加不仅导致芯片升温，降低芯片的稳定性，而且也增加了芯片的设计难度和缩短了芯片寿命。Cache作为处理器重要的组成部分，由于其需要具备容量大、速度快、访问频繁等特性，使之成为处理器芯片功耗的主要来源，因此设计低功耗Cache结构能有效地降低处理器整体功耗，对嵌入式系统的性能提高有重大意义。本文针对嵌入式系统环境，提出了两种改进的可重构Cache低功耗算法。本文的主要工作成果如下： (1)综合考虑容量与相联度对Cache性能影响的基础上，提出了一种降维可重构Cache算法。该算法根据Cache结构参数对不同应用程序影响的权值大小不同，先确定容量最优解，再确定相联度最优解的检索顺序来进行Cache参数配置；其次，算法将对检索效果进行判断，若检索效果不佳，则继续采用先确定相联度最优解后确定容量最优解的检索顺序，若程序仍处于不稳定状态，则动态调整阀值，朝失效率减少的方向搜索最优Cache结构。仿真实验结果表明，该算法能有效地降低Cache失效率和减少Cache能耗损失。 (2)在降维可重构Cache算法的基础上，提出了一种基于指令工作集的可重构Cache算法。该算法通过记录高频出现的程序段指令工作集签名及其最佳Cache配置参数，，若程序发生变化时，通过分析比较程序段指令工作集签名，采用特征值匹配的方法预重构Cache，若程序仍然处于不稳定状态，则从当前状态以降维重构的方法继续调整Cache容量和相联度。仿真实验结果表明，相比降维算法，该算法能够有效提高监测程序变化的准确度和优化重构路径，并且能有效提高Cache性能。本文基于Sim-panalyzer平台对算法进行了仿真模拟，实验结果与理论推导相符合。与近年来相关论文的比较验证了本设计的创新性和实用性。本文的低功耗重构算法为生产嵌入式低功耗产品提供了技术支持。
[Abstract]:The rapid development of electronic technology has greatly improved the integration and working speed of the processor. Although the performance has been greatly improved, the power consumption of the processor has also increased rapidly. The increase of power consumption not only causes the chip to warm up and reduce the stability of the chip, but also increases the design difficulty of the chip and shortens the life of the chip. Cache is an important part of the processor. Access frequency and other characteristics make it the main source of power consumption in processor chips. Therefore, the design of low power cache architecture can effectively reduce the overall power consumption of the processor, and it is of great significance to improve the performance of embedded systems. In this paper, two improved reconfigurable cache low power algorithms are proposed for embedded system environment. The main results of this paper are as follows: 1) based on the effect of capacity and coherence on cache performance, a dimensionally reduced reconfigurable cache algorithm is proposed. According to the influence of cache structure parameters on the weights of different applications, the algorithm first determines the optimal solution of capacity, then determines the retrieval order of the optimal solution of association degree to configure the Cache parameters; secondly, the algorithm will judge the retrieval effect. If the retrieval effect is not good, the search order of the optimal solution of the degree of association and the optimal solution of the capacity is determined first. If the program is still in an unstable state, the threshold is dynamically adjusted to search for the optimal cache structure in the direction of reducing the failure rate. Simulation results show that the proposed algorithm can effectively reduce the cache failure rate and reduce the energy loss of cache. On the basis of dimensionality reduction reconfigurable cache algorithm, a reconfigurable cache algorithm based on instruction working set is proposed. The algorithm records the high frequency program segment instruction working set signature and its optimal cache configuration parameter, and analyzes and compares the program segment instruction working set signature if the program changes. The method of eigenvalue matching is used to pre-reconstruct Cache.If the program is still in an unstable state, the cache capacity and the degree of association can be adjusted continuously from the current state by dimensionality reduction. The simulation results show that the algorithm can effectively improve the accuracy of monitoring program change, optimize the reconstruction path, and improve the performance of cache, compared with the dimensionality reduction algorithm. This paper simulates the algorithm based on Sim-p analyzer platform. The experimental results are in agreement with the theoretical derivation. The comparison with related papers in recent years verifies the innovation and practicability of this design. The low-power reconstruction algorithm in this paper provides technical support for the production of embedded low-power products.
【学位授予单位】：湖南大学
【学位级别】：硕士
【学位授予年份】：2013
【分类号】：TP332

【参考文献】