纳米浮栅存储器件的仿真、试制与特性表征
发布时间:2018-06-12 10:42
本文选题:非挥发性存储器件 + 硅纳米晶体 ; 参考:《电子科技大学》2012年硕士论文
【摘要】:在应对半导体制造技术不断发展的潮流时,传统非挥发性存储器件的连续浮栅结构制约了其向更小尺寸发展,需要在保持浮栅存储器件工作机理不变的前提下,继续发展浮栅存储器。纳米晶体浮栅存储器件是解决传统浮栅存储器件面临的小尺寸限制的有效办法,这为纳米晶体浮栅存储器件的发展提供了极大的动力。 本文阐述了纳米晶体浮栅存储器件的发展背景,包括非挥发性存储器的市场前景和发展形势,以及纳米晶体浮栅存储器件的优势等;介绍了非挥发性存储器件的理论知识和纳米晶体浮栅存储器件的纳米特性;并利用工艺仿真软件Tsuprem4和器件仿真软件Medici对硅纳米晶体浮栅存储器件建模和仿真了其电学特性等;试制了不同沟道长度的N沟道硅纳米晶体浮栅存储器件并对其做了常规的测试分析。 本文具体完成以下工作: (a)、利用Tsuprem4建立了硅纳米晶体浮栅存储器件的仿真模型,然后利用Medici对模型的电学特性进行仿真分析,另外研究了硅纳米晶体浮栅存储器件的几个重要结构参数对存储器件的存储特性(主要是存储窗口)的影响,对硅纳米晶体浮栅存储器件的数据保持能力进行了Matlab建模分析。 (b)、讨论了硅纳米晶体的制备方法和利用标准2μm CMOS工艺制备硅纳米晶体浮栅存储器件的工艺流程,并将离子注入和退火制备硅纳米晶体的方法加入NTU-MFL2μm NWell CMOS中的Single-Poly-Single-Metal (SPSM)标准CMOS工艺中,成功试制了一批具有不同沟道长度的N沟道硅纳米晶体浮栅存储器件。 (c)、利用搭建的测试平台对制备出来的硅纳米晶体浮栅存储器件进行了室温下的测试分析,包括TEM切片分析、写入/擦除操作脉冲与存储窗口的关系,,并测试分析了存储器件的耐擦写能力和数据保持能力。测试结果表明,试制的硅纳米晶体浮栅存储器件具有较大的存储窗口,优良的耐擦写能力和数据保持能力。
[Abstract]:In response to the continuous development of semiconductor manufacturing technology, the continuous floating gate structure of traditional non-volatile memory devices restricts its development to smaller dimensions, so it is necessary to keep the working mechanism of floating gate memory devices unchanged. Continue to develop floating gate memory. Nanocrystalline floating gate memory device is an effective method to solve the small size limitation of traditional floating gate memory device. This provides a great impetus for the development of nanocrystalline floating gate memory devices. This paper describes the development background of nanocrystalline floating gate memory devices, including the market prospect and development situation of non-volatile memory. And the advantages of nanocrystalline floating gate memory devices, the theoretical knowledge of non-volatile memory devices and the nanometer characteristics of nanocrystalline floating gate memory devices are introduced. The process simulation software Tsuprem4 and the device simulation software Medici are used to model and simulate the electrical properties of silicon nanocrystalline floating gate memory device. N-channel silicon nanocrystalline floating gate memory devices with different channel lengths have been fabricated and analyzed. In this paper, the following work has been done: (1) the simulation model of silicon nanocrystalline floating gate memory device is established by Tsuprem4. Then the electrical characteristics of the model are simulated and analyzed by Medici, and the influence of several important structure parameters of silicon nanocrystalline floating gate memory device on the memory characteristics (mainly memory window) is studied. The data retention ability of silicon nanocrystalline floating gate memory device is modeled and analyzed by Matlab. The fabrication method of silicon nanocrystalline and the process of fabricating silicon nanocrystalline floating gate memory device using standard 2 渭 m CMOS process are discussed. The method of ion implantation and annealing to fabricate silicon nanocrystalline is added to the standard CMOS process of Single-Poly-Single-Metal SPSMin NTU-MFL2 渭 m well CMOS. A batch of N-channel silicon nanocrystalline floating gate memory devices with different channel lengths have been successfully manufactured. The fabricated silicon nanocrystalline floating gate memory devices have been tested and analyzed at room temperature, including TEM slice analysis. The relationship between the write / erase operation pulse and the memory window is also tested and analyzed, and the erasability and data retention of the memory device are tested and analyzed. The test results show that the fabricated silicon nanocrystalline floating gate memory device has a large memory window, excellent erasability and data retention.
【学位授予单位】:电子科技大学
【学位级别】:硕士
【学位授予年份】:2012
【分类号】:TP333
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相关硕士学位论文 前1条
1 宁润苏;纳米晶浮栅结构先进存储器的研究与模拟[D];电子科技大学;2009年
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