当前位置:主页 > 科技论文 > 计算机论文 >

反熔丝PROM存储器设计

发布时间:2018-06-19 07:29

  本文选题:反熔丝 + PROM存储器 ; 参考:《东南大学》2016年硕士论文


【摘要】:一次性可编程(OTP)存储器一旦写入数据,存储单元就一直是击穿或者熔断的状态。这种击穿或者熔断的编程条件(如高电压)在存储器正常工作时是不存在的,从而保证了OTP存储器较高的可靠性。OTP存储器可以由用户自主进行一次编程,而且在未编程的区域,可以通过一定的数据管理算法对数据进行更新和替换,增加了数据存储空间使用的灵活性,且其设计简单、成本较低,在嵌入式系统、航空航天以及密钥存储等应用中非常适用。本文设计的基于反熔丝存储单元的OTP存储器包含存储阵列、地址译码器、编程电路和读取电路、错误检测与纠正电路、电源模块和逻辑控制模块等。本文首先研究了反熔丝存储单元,比较了三种反熔丝存储单元结构之后选择了单晶体管反熔丝存储单元,这种结构在读取速度和存储容量上有明显的优势,非常适合于大容量存储器产品的应用需求。研究了存储单元的存储机理、击穿特性以及击穿之后的电阻特性,完成了存储阵列的设计。然后,论文对存储器的外围电路进行了分析与设计。采用了多维译码的方式,方面配合了存储阵列的排布,另一方面有效地减小了延时;设计了编程电路和读取电路以实现数据的写入和读出;为了尽可能地保证存储数据的准确性和可靠性,加入了错误检测与纠正和冗余功能;设计了低压差线性稳压器(LDO)为数据的读取提供2.4V的读电压,该LDO采用了单晶体管控制结构,以改善其瞬态响应。最后用Spectre和Nanosim对系统进行了仿真。仿真结果表明该反熔丝可编程只读存储器各项功能和性能均能满足预期要求。本文在常规商用工艺上实现了存储容量为16k比特的反熔丝可编程只读存储器,该存储器可以用于为主控芯片(如CPU)提供配置数据和重要程序数据的存储。
[Abstract]:Once the data is written, the memory cell is always a breakdown or fuse state. This breakdown or fuse programming condition, such as high voltage, does not exist when the memory is working properly, thus ensuring the high reliability of the OTP memory. The OTP memory can be programmed by the user on his own initiative, and in unprogrammed areas, The data can be updated and replaced by a certain data management algorithm, which increases the flexibility of the use of data storage space, and its design is simple, the cost is low, in the embedded system, Aerospace and key storage and other applications are very suitable. The OTP memory based on anti-fuse memory cell is designed in this paper, which includes memory array, address decoder, programming circuit and read circuit, error detection and correction circuit, power supply module and logic control module. In this paper, we first study the anti-fuse memory cell, compare three kinds of anti-fuse memory cell structure, and choose the single-transistor anti-fuse memory cell. This structure has obvious advantages in reading speed and storage capacity. It is very suitable for the application of mass storage products. The memory mechanism, breakdown characteristics and resistance characteristics of the memory cell are studied, and the design of the memory array is completed. Then, the peripheral circuit of the memory is analyzed and designed. The multi-dimension decoding method is adopted, the storage array is arranged in the aspect, on the other hand, the delay is reduced effectively, and the programming circuit and the reading circuit are designed to realize the data writing and reading. In order to ensure the accuracy and reliability of the stored data as much as possible, the functions of error detection, correction and redundancy are added, and a low voltage differential linear voltage regulator (LDO) is designed to provide a reading voltage of 2.4 V for data reading. The LDO adopts a single-transistor control structure. To improve its transient response. Finally, the system is simulated with Spectre and Nanosim. The simulation results show that the function and performance of the anti-fuse programmable read-only memory can meet the expected requirements. In this paper, an anti-fuse programmable read-only memory with a storage capacity of 16k bits is implemented in a conventional commercial process. The memory can be used to store configuration data and important program data for the main control chip (such as CPU).
【学位授予单位】:东南大学
【学位级别】:硕士
【学位授予年份】:2016
【分类号】:TP333

【参考文献】

相关期刊论文 前4条

1 郝丽;于立新;彭和平;庄伟;;Low cost design of microprocessor EDAC circuit[J];Journal of Semiconductors;2015年11期

2 周国昌;赖晓玲;朱启;巨艇;于登云;郭阳明;;一种改进的基于时钟沿的单粒子翻转自检纠错方法[J];西北工业大学学报;2015年05期

3 刘鑫;赵发展;刘梦新;韩郑生;;高可靠性SRAM中缩短汉明码EDAC电路的失效分析[J];电子设计工程;2014年22期

4 吴晓青;龙翔;杨雄;;基于32位SPARC微处理器的EDAC设计[J];软件;2014年01期

相关硕士学位论文 前3条

1 丛伟林;16Mbit FPGA配置存储器设计研究[D];电子科技大学;2012年

2 吕百涛;SRAM PVT补偿方法研究及电路实现[D];安徽大学;2012年

3 陈奕含;OTP存储器设计与实现技术研究[D];电子科技大学;2012年



本文编号:2039103

资料下载
论文发表

本文链接:https://www.wllwen.com/kejilunwen/jisuanjikexuelunwen/2039103.html


Copyright(c)文论论文网All Rights Reserved | 网站地图 |

版权申明:资料由用户92de1***提供,本站仅收录摘要或目录,作者需要删除请E-mail邮箱bigeng88@qq.com