应用于RFID安全标签的ECC处理器研究与设计

发布时间：2018-06-30 20:04

本文选题：射频识别 + ECC加密算法　；参考：《复旦大学》2013年硕士论文

【摘要】：射频识别(Radio Frequency Identification, RFID)技术已经在社会生活的许多方面有着广泛的应用。然而其所面临的安全威胁和隐私问题也越来越引起关注。近年来,适用于RFID标签的各种加密算法安全也成为了研究热点。本文分析了应用于RFID系统的椭圆曲线加密算法的研究现状,描述了椭圆曲线加密算法的算法原理,设计了一款适用于RFID标签的椭圆曲线加密算法(Elliptic Curve Cryptography, ECC)处理器,并对安全标签芯片进行了电路实现、FPGA验证测试。在算法层,本文分析了ECC系统参数对安全性及实现成本的影响,确定采用投影坐标系下二进制扩域上163位长度的椭圆曲线。对实现ECC点乘的各种算法进行分析研究,选取了最适合RFID标签面积和功耗要求的Lopez-Dahab算法,并研究解决了实现该算法的各种难题。在电路设计方面,设计了专用的算术逻辑单元实现有限域上的加法、平方与乘法运算,并分别进行了优化。最后,为了验证本论文中所设计的ECC处理器的正确性与性能,验证了电路中各个算术单元的功能,采用FPGA进行功能验证,并在SMIC0.13工艺上完成了整个标签芯片的ASIC实现。芯片面积为0.4×0.4mmm2,在1.2V工作电压下功耗为20μA。验证结果表明该ECC处理器完全符合RFID标签功耗、面积和时序要求,达到了预期目标。
[Abstract]:Radio Frequency Identification (RFID) technology has been widely used in many aspects of social life. However, its security threats and privacy issues have attracted more and more attention. In recent years, the security of various encryption algorithms suitable for RFID tags has also become a research hotspot. In this paper, the research status of elliptic curve encryption algorithm used in RFID system is analyzed, the principle of elliptic curve encryption algorithm is described, and an Elliptic Curve Cryptograph (ECC) processor is designed for RFID tag. The security tag chip is tested by FPGA. In the algorithm layer, the influence of ECC system parameters on security and implementation cost is analyzed, and the 163-bit elliptic curve in the binary extended field in projection coordinate system is determined. Various algorithms for implementing ECC point multiplication are analyzed and studied. Lopez-Dahab algorithm, which is the most suitable for RFID tag area and power consumption requirements, is selected, and various problems in the implementation of this algorithm are studied and solved. In the aspect of circuit design, special arithmetic logic unit is designed to realize addition, square and multiplication on finite field, and the optimization is carried out respectively. Finally, in order to verify the correctness and performance of the ECC processor designed in this paper, the functions of each arithmetic unit in the circuit are verified. FPGA is used to verify the function, and the ASIC implementation of the whole tag chip is completed in SMIC0.13 process. The chip area is 0.4 脳 0.4mmm2, and the power consumption is 20 渭 A. The verification results show that the ECC processor fully meets the RFID tag power consumption, area and timing requirements, and achieves the desired goal.
【学位授予单位】：复旦大学
【学位级别】：硕士
【学位授予年份】：2013
【分类号】：TP332;TP391.44

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