基于堆栈处理器的SOPC的研究与实现

发布时间：2018-07-01 13:02

本文选题：嵌入式 + 堆栈处理器　；参考：《南京航空航天大学》2012年硕士论文

【摘要】：嵌入式微处理器作为嵌入式系统的核心，其重要性不言而喻。堆栈处理器是一种专门面向嵌入式控制领域的处理器，其所有执行过程均依赖于硬件支持的堆栈，而不是通用寄存器。因此，相比较于传统的RISC和CISC处理器，堆栈处理器具有以下三点优势：（1）避免了上下文切换带来的开销，这是因为处理器的运行不依赖于大量的通用寄存器；（2）寻址方式非常简单，这是因为几乎所有指令都是0操作数指令；（3）更加适合执行具有深度递归或者嵌套特征的程序，这是因为具有专门的硬件堆栈支持子程序调用与返回。目前国内鲜有相关研究报道，因此研究并实现出高性能的堆栈处理器具有重要的意义。本文围绕堆栈处理器做了两方面的工作：一是设计与实现，二是应用。在堆栈处理器的设计与实现方面，，本文首先采用基于FPGA的方式设计与实现了一款16位单周期堆栈处理器。该处理器包含两个堆栈：执行数学表达式的数据堆栈和支持子程序调用的返回堆栈。它具有结构紧凑、系统复杂度低、主频性能高以及代码体积小等优点。其次，为了提高处理器性能，本文将流水线技术应用于单周期堆栈处理器，设计与实现了三级流水线的堆栈处理器，详细讨论了流水线技术带来的冒险问题，并给出了解决方法。在堆栈处理器的应用方面，本文以单周期堆栈处理器与流水线堆栈处理器为核心分别构建出了SOPC，为SOPC设计了总线控制器，中断控制器以及多种外设。论文详细介绍了SOPC的架构，描述了每一种外设的功能。堆栈处理器仅使用常规的访存指令就可以控制中断控制器与所有外设。本文的所有设计均采用Verilog硬件描述语言进行RTL级描述，采用ModelSim软件进行功能仿真，采用Synplify软件进行综合。仿真与综合的结果证明本文设计的堆栈处理器与SOPC功能正确。在以XC5VLX110T为目标芯片时，单周期堆栈处理器与流水线堆栈处理器的主频分别达到了146.7MHz与257.1MHz。结果优于国外同类设计，性能令人满意。
[Abstract]:As the core of embedded system, the importance of embedded microprocessor is self-evident. Stack processor is a special processor for embedded control domain. All of its execution process depends on the stack supported by hardware instead of general register. Therefore, compared with the traditional RISC and CISC processors, the stack processor has the following three advantages: (1) the overhead caused by context switching is avoided because the processor does not rely on a large number of general registers; (2) the addressing method is very simple, because almost all instructions are zero Operand instructions; (3) it is more suitable to execute programs with deep recursion or nesting characteristics because of the special hardware stack support subroutine call and return. There are few reports in China, so it is very important to study and implement high performance stack processor. This paper has done two aspects of work around stack processor: one is design and implementation, the other is application. In the aspect of stack processor design and implementation, this paper first designs and implements a 16-bit single cycle stack processor based on FPGA. The processor consists of two stacks: a data stack that executes mathematical expressions and a return stack that supports subroutine calls. It has the advantages of compact structure, low system complexity, high main frequency performance and small code size. Secondly, in order to improve the processor performance, this paper applies pipeline technology to single-cycle stack processor, designs and implements three-stage pipeline stack processor, discusses the adventure problem brought by pipeline technology in detail. The solution is given. In the application of stack processor, this paper constructs SOPC based on single cycle stack processor and pipeline stack processor, and designs bus controller, interrupt controller and many peripheral devices for SOPC. The architecture of SOPC is introduced in detail, and the functions of each peripheral are described. The stack processor can control the interrupt controller and all peripherals using only regular memory access instructions. All the designs in this paper are described at RTL level by Verilog hardware description language, functional simulation by ModelSim software and synthesis by Synplify software. The results of simulation and synthesis show that the stack processor and SOPC designed in this paper are correct. With XC5VLX110T as the target chip, the main frequency of single-cycle stack processor and pipeline stack processor are 146.7 MHz and 257.1 MHz respectively. The result is superior to the similar design abroad and the performance is satisfactory.
【学位授予单位】：南京航空航天大学
【学位级别】：硕士
【学位授予年份】：2012
【分类号】：TN47;TP368.1

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