低电压SRAM下的针对漏流的新型加法校准技术

发布时间：2018-07-05 17:32

本文选题：SRAM + 漏电流　；参考：《安徽大学》2017年硕士论文

【摘要】：随着半导体工艺的进步,SRAM朝着高速,低功耗的方向不断迈进。然而,存在于位线上的漏电流也越来越大。漏电流的增大导致了 SRAM性能的下降。尤其是,当泄漏电流的大小达到一个临界值时,会造成读失效。因此,对漏电流的研究至关重要。本文的主要工作如下:1、本文首先介绍了 SRAM的三种基本操作,分别是读操作,写操作和保持操作。然后介绍了国内外几种经典的漏流应对技术,包括BLC技术、X-calibration技术以及位线正反馈补偿技术。详细分析了它们的工作原理,并且总结了各自的优缺点。2、为了加快灵敏放大器(SA)的读取速度,本文提出了一种基于X-calibration(XC)电路的改进方案,即加法校准电路(Additive Calibration,AC)。通过实验手段,证实了加法校准电路能够花费更少的时间来读出数据,提升了 SRAM的性能。不过这种改动能承受的漏电流的大小和XC相近。而且需要一个较长的漏流检测阶段,不适合工作在高频下。不过AC方案依然有着改进的空间,来克服上述缺点。3、本文进一步对2中的电路加以改进,从时序入手,增加了二次预充的环节,得到NAC电路。二次改进后的NAC方案,它最主要的特点在于时序的调整,比XC技术多了一个操作。仿真结果说明,NAC的优点不仅在于同加法校准电路一样提高了 SA的驱动能力。更重要的,在于它能比XC承受更大的漏流,这符合当今漏流补偿技术的发展趋势。在SMIC65nm工艺下,基于本文提出的技术,具体实现电路的最终仿真结果是.·可承受漏流的能力相比传统SRAM结构和X-calibration技术分别提升了 119%和45.5%。
[Abstract]:With the progress of semiconductor technology, SRAM is moving towards high speed and low power consumption. However, the leakage current on the bit line is also increasing. The increase of leakage current leads to the degradation of SRAM performance. In particular, read failure occurs when the leakage current reaches a critical value. Therefore, the study of leakage current is very important. The main work of this paper is as follows: 1. This paper first introduces three basic operations of SRAM, which are read operation, write operation and hold operation. Then several classical leakage response technologies are introduced, including BLC X-Calibration technology and bit line positive feedback compensation technology. In order to speed up the reading speed of the sensitive amplifier (SA), an improved scheme based on X-Calibration (XC) is proposed, which is called Additive Calibration AC. The experimental results show that the additive calibration circuit can take less time to read out the data and improve the performance of SRAM. However, this change can withstand the size of the leakage current and XC similar. And it needs a long leakage detection stage, which is not suitable to work at high frequency. However, there is still room for improvement in AC scheme to overcome the above shortcomings. In this paper, the circuit in 2 is further improved. Starting from the timing, the secondary precharge link is added to obtain the NAC circuit. The second improved NAC scheme, whose main feature is timing adjustment, has one more operation than XC technology. The simulation results show that the advantage of NAC is not only that it improves the driving ability of SA as well as the additive calibration circuit. More importantly, it can withstand larger leakage than XC, which is in line with the current trend of leakage compensation technology. In SMIC65nm process, based on the technology proposed in this paper, the final simulation results of the circuit are as follows: compared with the traditional SRAM structure and X-Calibration technology, the capability of withstanding leakage current is improved by 119% and 45.55.5respectively.
【学位授予单位】：安徽大学
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：TP333

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