缓存共享的容错NoC设计

发布时间：2018-07-11 10:39

本文选题：片上网络 + 路由器　；参考：《武汉理工大学》2013年硕士论文

【摘要】：片上网络(Network-on-Chip, NoC)作为一个新的设计方法被提出,它弥补了片上系统(System-on-Chip, SoC)带来的一系列问题：可扩展性差、总线通讯效率低、单一时钟同步等。NoC采用全局异步--局部同步的通讯机制,不仅有良好的可扩展性和可预测性,还提供了高带宽的并行通讯能力。随着对NoC不断深入的研究,给设计者们引入了新的机遇和挑战,例如功耗和稳定性。为了获得高性能的片上网络,大量的缓存被利用到片上网络通信中,造成了缓存冗余和功耗泄露。并且,研究发现当片上网络中缓存达到一定数目时,片上网络的性能并不是随着缓存队列数目的增加而线性增长的,反而对整个网络造成负面影响。研究表明片上网络中所有路由器的缓存队列占据了整个网络缓存的60%左右,缓存在时间和空间上利用率低,从而导致了大量的功耗泄漏,更重要的是路由器中的缓存队列不能共享严重造成了功耗浪费。因此,本文对通用路由器内部结构进行优化,设计出缓存共享的路由器。该路由器减少计算单元(Processing Element. PE)输入物理通道的缓存队列,使其与其他端口的输入物理通道的缓存队列共享,提高了缓存的利用率,降低功耗和硬件开销。基于缓存共享的路由器,本文提出了容错的路由算法。由于片上网络体系结构对路由节点的错误很敏感,一旦有链路或者路由器出现问题,核之间的通信就不能得到保证。尤其随着片上网络IP核的增加,路由器和链路故障会对整个网络造成不可想象的灾难。所以路由算法是否具有容错能力影响整个体系结构的稳定性。本文提出了一个融合缓存共享路由器的容错路由算法,该算法在PE输入物理通道分别与X维、Y维输入物理通道缓存共享的情况下,通过动态阈值来控制整个网络的拥塞,在最短路径中选择没有故障和拥塞度相对较小的路径,将数据包从源节点发送到目的节点,改善了整个网络的延迟,提高了稳定性,在一定程度上降低了功耗开销。最后,本文利用周期精确的Noxim模拟器,在三种不同的流量模式下,分别对本文的路由算法、XY路由算法和DyAD路由算法进行了性能和功耗上的评估,仿真结果发现本文的路由算法性能都优于其它两种路由算法。在随机流量模式下,针对故障节点数量的不同,实验结果显示容错路由算法相比NF路由算法和DyAD路由算法有较高的稳定性,功耗相比前两者要节省10%左右功耗开销。
[Abstract]:As a new design method, Network-on-Chip (NOC) is proposed to make up for a series of problems caused by System-on-Chip (SoC): poor scalability and low bus communication efficiency. Single clock synchronization. NOC adopts global asynchronous-local synchronous communication mechanism which not only has good scalability and predictability but also provides high bandwidth parallel communication capability. With the in-depth study of NOC, new opportunities and challenges, such as power consumption and stability, have been introduced to designers. In order to obtain high performance on-chip network, a large number of buffers are utilized in on-chip network communication, resulting in cache redundancy and power leakage. Furthermore, it is found that the performance of the on-chip network does not increase linearly with the increase of the number of cache queues, but has a negative impact on the whole network when the cache in the on-chip network reaches a certain number. The research shows that the cache queue of all routers in the on-chip network accounts for about 60% of the whole network cache, and the cache utilization is low in time and space, which leads to a lot of power leakage. More importantly, cache queues in routers can not be shared, resulting in a serious waste of power. Therefore, this paper optimizes the internal structure of general router and designs a cache-sharing router. The router reduces processing element. The PE) inputs the cache queue of the physical channel to share it with the cache queue of the input physical channel of other ports, which improves the utilization of the cache, reduces the power consumption and hardware overhead. Based on cache sharing router, this paper proposes a fault-tolerant routing algorithm. Because the on-chip network architecture is sensitive to the errors of routing nodes, the communication between cores cannot be guaranteed once there is a link or router problem. Especially with the increase of IP core, router and link failure will cause unimaginable disaster to the whole network. Therefore, whether the routing algorithm has fault-tolerant ability affects the stability of the whole architecture. In this paper, a fault-tolerant routing algorithm combining buffer sharing router is proposed. Under the condition that PE input physical channel and X dimensional Y dimensional input physical channel cache are shared separately, the congestion of the whole network is controlled by dynamic threshold. In the shortest path, the path with no fault and relatively small congestion degree is chosen, and the packet is sent from the source node to the destination node, which improves the delay of the whole network, improves the stability, and reduces the power consumption to a certain extent. Finally, using the periodic accurate Noxim simulator, the performance and power consumption of the routing algorithms (XY routing algorithm and DyAD routing algorithm) are evaluated in three different traffic modes. Simulation results show that the performance of the routing algorithm is better than the other two routing algorithms. In the random traffic mode, the experimental results show that the fault-tolerant routing algorithm is more stable than NF routing algorithm and DyAD routing algorithm, and the power consumption is about 10% less than that of the former two algorithms.
【学位授予单位】：武汉理工大学
【学位级别】：硕士
【学位授予年份】：2013
【分类号】：TN47;TP302.8

【参考文献】