基于MLC NVM的写能耗优化策略研究与设计

发布时间：2018-07-11 16:57

本文选题：非易失性存储器 + NVM　；参考：《山东大学》2017年硕士论文

【摘要】：随着集成电路集成度的不断增加、工艺尺寸的不断微缩,静态功耗已经成为制约CMOS存储器技术发展的主要瓶颈。这一问题在动态随机存储器(DRAM)以及静态随机存储器(SRAM)上都十分突出。DRAM需要刷新操作来保持数据,所以其静态功耗占到整个DRAM功耗的40%以上。对于SRAM存储单元,如果想将数据持续保存在存储单元内,就需要持续对存储单元供电。非易失性存储器(NVM),是其中一种作为解决传统存储技术所遇到的技术瓶颈而研究的新型存储技术,它的主要特点就是断电后数据依然可以保存在存储单元内。主流的非易失存储技术有相变存储器(PCM)和自旋转移矩磁存储器(STT-MRAM)等,它们具有高存储密度,高可靠性,非易失性等特点。而且PCM有着与DRAM相近的存取延迟,其在未来有可能代替DRAM成为主存储器;STT-MRAM有着略高于SRAM的存取延迟,近年来针对STT-MRAM的各项研究主要集中在其作为片上末级缓存的研究。多级单元(MLC)就是在一个单元格中存储一个以上的bit,一般指存储两个。相较单级单元(SLC),MLC可以有更高的存储密度。MLCNVM与SLC NVM在物理结构上并无本质区别,同样也几乎没有静态能耗,但是,却有着更高的动态能耗。本文针对MLC NVM动态写能耗过高的问题进行的优化。对于MLC PCM以及MLC STT-MRAM,翻转左位的平均能耗要比不翻转左位的平均能耗高很多,另外,写中间状态'01'与'10'的平均能耗要高于写'00'与'11'的平均能耗。本文在已有的编码策略——状态重映射策略的基础上,进一步针对MLC PCM以及MLC STT-MRAM在写能耗方面的特性,对每次写入存储器中的数据进行分析,改进获得状态重映射方式的算法,从而获得更优的能耗优化结果。该策略通过统计每种状态转换的数量,并对每种状态转换赋予能耗权值,计算不同的状态重映射后数据的写入能耗与原始数据的写入能耗之间的差距,从中选取出能耗最优的重映射方式。通过试验对比,我们发现,在MLCPCM的能耗模型下,本文策略相较基准写策略可以减少平均约6.17%的写能耗,在MLCSTT-MRAM能耗模型下,可以减少平均约12.17%的写能耗。
[Abstract]:With the increasing integration of integrated circuits and the continuous shrinking of process size, static power consumption has become the main bottleneck restricting the development of CMOS memory technology. This problem is very prominent in both dynamic random access memory (DRAM) and static random access memory (SRAM). DRAM requires refresh operations to maintain data, so its static power consumption accounts for more than 40% of the total DRAM power consumption. For SRAM storage cells, if you want to keep the data in the memory cell, you need to continuously supply power to the memory cell. Non-volatile memory (NVM) is one of the new storage technologies which is studied as a solution to the bottleneck of traditional storage technology. Its main feature is that the data can still be stored in the memory cell after power off. The main non-volatile memory technologies include phase change memory (PCM) and spin transfer moment magnetic memory (STT-MRAM), which have the characteristics of high storage density, high reliability and non-volatile. PCM has the same access delay as DRAM, and it may replace DRAM as the main memory in the future, STT-MRAM has a slightly higher access delay than SRAM. In recent years, the research of STT-MRAM is mainly focused on the research of STT-MRAM as the last stage buffer on the chip. Multilevel cells (MLC) store more than one bit in a cell. Compared with single stage cell (SLC) MLC can have higher storage density. MLCNVM and SLC NVM have no essential difference in physical structure and almost no static energy consumption. However, it has higher dynamic energy consumption. This paper focuses on the optimization of MLC NVM with high dynamic write energy consumption. For MLC PCM and MLC STT-MRAM, the average energy consumption of flipping left position is much higher than that of not flipping left position. In addition, the average energy consumption of writing intermediate states 0 'and 10' is higher than that of writing 0 'and 1'. Based on the existing coding strategy-state remapping strategy, this paper analyzes the data in every write memory according to the characteristics of MLC PCM and MLC STT-MRAM in write energy consumption, and improves the algorithm to obtain the state remapping method. Thus, a better result of energy consumption optimization is obtained. The strategy calculates the difference between the energy consumption of the data after different state remapping and the energy consumption of the original data by counting the number of each state transition and assigning the energy consumption weight to each state transition. The optimal remapping method of energy consumption is selected. Through experimental comparison, we find that under the MLCPCM energy consumption model, the average write energy consumption can be reduced by about 6.17% compared with the reference writing strategy, and the average write energy consumption can be reduced by about 12.17% under the MLCSTT-MRAM energy consumption model.
【学位授予单位】：山东大学
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：TP333

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