反馈移位寄存器在通用可重构处理器上的配置生成与优化设计
发布时间：2018-07-31 05:48
【摘要】：在序列密码算法中,反馈移位寄存器的操作使用频率高且移位位宽和反馈网络灵活多变。针对目前还没有一个通用可配置且支持不同规模的移位寄存器实现方法,利用通用可重构处理器基本运算单元数据流和控制流可配置的特点,充分挖掘移位寄存器中并行流水潜力,在通用可重构处理器上,设计反馈移位寄存器的四种不同实现方案,并对算子在通用处理器以及可重构处理器模型上进行性能对比分析。实验表明,运用可重构的方法实现A5密码算法中的反馈移位寄存器效率较Intel ATOM230处理器提高12.6倍。最后在考虑可重构处理器资源制约的条件下,对反馈移位寄存器的实现方法进行优化讨论。
[Abstract]:In the sequential cipher algorithm, the feedback shift register has high frequency of operation, wide shift bit and flexible feedback network. In view of the fact that there is no universal configurable method to implement shift registers with different sizes, the general reconfigurable processor can be used to configure the data flow of the basic operation unit and the control flow. The potential of parallel pipelining in shift registers is fully exploited. Four different implementation schemes of feedback shift registers are designed on general purpose reconfigurable processors, and the performance of operators on general purpose processors and reconfigurable processor models is compared and analyzed. Experiments show that the efficiency of feedback shift register in A5 cryptosystem is 12.6 times higher than that of Intel ATOM230 processor. Finally, considering the resource constraints of reconfigurable processors, the implementation of feedback shift registers is optimized.
【作者单位】： 解放军信息工程大学河南省信息安全重点实验室;
【基金】：国家“863”计划资助项目(2012AA012704) 国家“973”前期研究项目(2011CB311801)
【分类号】：TP332
本文编号：2154620
[Abstract]:In the sequential cipher algorithm, the feedback shift register has high frequency of operation, wide shift bit and flexible feedback network. In view of the fact that there is no universal configurable method to implement shift registers with different sizes, the general reconfigurable processor can be used to configure the data flow of the basic operation unit and the control flow. The potential of parallel pipelining in shift registers is fully exploited. Four different implementation schemes of feedback shift registers are designed on general purpose reconfigurable processors, and the performance of operators on general purpose processors and reconfigurable processor models is compared and analyzed. Experiments show that the efficiency of feedback shift register in A5 cryptosystem is 12.6 times higher than that of Intel ATOM230 processor. Finally, considering the resource constraints of reconfigurable processors, the implementation of feedback shift registers is optimized.
【作者单位】： 解放军信息工程大学河南省信息安全重点实验室;
【基金】：国家“863”计划资助项目(2012AA012704) 国家“973”前期研究项目(2011CB311801)
【分类号】：TP332
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