基于三模冗余综合电子系统的研究
发布时间：2018-08-03 08:00
【摘要】：综合电子系统是皮卫星的数据和指令枢纽,承担皮卫星数据处理、数据存储、数据传输及指令收发、响应等重要任务,是皮卫星的核心组成部分。皮卫星综合电子系统大都采用高性能商用处理器,其性能一般都能满足系统需求,可靠性是皮卫星综合电子系统研究的重点。三模冗余是提高系统可靠性的一种常用方法,通常有基于时钟同步和基于任务同步两种途径实现。相对于任务同步,基于时钟同步的三模冗余系统降低了软件设计复杂度,具有更好通用性,无疑是皮卫星综合电子系统的首选。 本文对基于时钟同步的三模冗余系统进行研究,根据三模冗余系统研究要求,结合皮卫星实际工程应用需求,完成了高可靠综合电子系统的方案设计及硬件实现,经测试表明设计的综合电子系统满足皮卫星工程应用需求。 对三模冗余系统时钟同步问题进行了研究,结果表明DSP程序运行在片内时,3个DSP可以实现时钟同步,DSP程序运行在片外时,3个DSP不能保证时钟同步；对时钟不同步原因进行了分析,通过分析和实验发现DSP CPU与EMFIB口间通信有可能是DSP程序运行在片外时不同步的原因。
[Abstract]:The integrated electronic system is the data and instruction hub of the picosatellite. It is the core component of the picosatellite, which is responsible for the important tasks of data processing, data storage, data transmission, instruction receiving and sending and responding. The picosatellite integrated electronic system mostly uses high performance commercial processor, its performance generally can meet the system demand, the reliability is the focal point of the research of the picosatellite integrated electronic system. Triple mode redundancy is a common method to improve the reliability of the system. It is usually realized by two ways: clock synchronization and task-based synchronization. Compared with task synchronization, the three-mode redundant system based on clock synchronization reduces the complexity of software design and has better versatility. It is undoubtedly the first choice of integrated electronic system of picosatellite. In this paper, the three-mode redundancy system based on clock synchronization is studied. According to the requirements of the three-mode redundancy system and the practical engineering application requirements of the picosatellite, the scheme design and hardware implementation of the high-reliability integrated electronic system are completed. The test results show that the designed integrated electronic system can meet the requirements of picosatellite engineering applications. The problem of clock synchronization in three-mode redundant system is studied. The results show that when the DSP program is running in the chip, three DSP programs can realize the clock synchronization while the DSP program is running off-chip, and the three DSP can not guarantee the clock synchronization. By analyzing and experimenting the reason of clock unsynchronism, it is found that the communication between DSP CPU and EMFIB port may be the reason why DSP program is not synchronized when it is running out of chip.
【学位授予单位】：浙江大学
【学位级别】：硕士
【学位授予年份】：2013
【分类号】：TP368.1;V443
本文编号：2161110
[Abstract]:The integrated electronic system is the data and instruction hub of the picosatellite. It is the core component of the picosatellite, which is responsible for the important tasks of data processing, data storage, data transmission, instruction receiving and sending and responding. The picosatellite integrated electronic system mostly uses high performance commercial processor, its performance generally can meet the system demand, the reliability is the focal point of the research of the picosatellite integrated electronic system. Triple mode redundancy is a common method to improve the reliability of the system. It is usually realized by two ways: clock synchronization and task-based synchronization. Compared with task synchronization, the three-mode redundant system based on clock synchronization reduces the complexity of software design and has better versatility. It is undoubtedly the first choice of integrated electronic system of picosatellite. In this paper, the three-mode redundancy system based on clock synchronization is studied. According to the requirements of the three-mode redundancy system and the practical engineering application requirements of the picosatellite, the scheme design and hardware implementation of the high-reliability integrated electronic system are completed. The test results show that the designed integrated electronic system can meet the requirements of picosatellite engineering applications. The problem of clock synchronization in three-mode redundant system is studied. The results show that when the DSP program is running in the chip, three DSP programs can realize the clock synchronization while the DSP program is running off-chip, and the three DSP can not guarantee the clock synchronization. By analyzing and experimenting the reason of clock unsynchronism, it is found that the communication between DSP CPU and EMFIB port may be the reason why DSP program is not synchronized when it is running out of chip.
【学位授予单位】：浙江大学
【学位级别】：硕士
【学位授予年份】：2013
【分类号】：TP368.1;V443
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