基于NAND闪存的固态盘关键技术研究

发布时间：2018-08-12 14:38

【摘要】：近半个世纪来,随着计算机体系结构技术及芯片加工技术的不断进步,计算机系统的CPU性能与IO性能的差距不断扩大。计算机系统IO性能的瓶颈在于硬盘。这些年虽然磁盘容量有了迅速提升,但由于其存在机械旋转结构,访问速度提升有限,使得基于硬盘的存储系统成为计算机系统的性能瓶颈之一。相比于传统的硬盘,固态硬盘呈现出许多优良的性能:低功耗,读写速度快,防震抗摔性好,无噪音,重量轻等,因此固态硬盘在许多领域已经开始替代传统硬盘。然而,固态硬盘也继承闪存的缺点,包括读写不对称、写前擦除、有限的擦除次数等。本文主要研究固态硬盘设计中的缓冲区管理算法和闪存转换层算法,以减少对固态硬盘的写和擦除次数。在缓冲区管理算法设计中,本文提出了一种面向页级FTL的缓冲区管理算法——VBBMS(Virtual-Block-based Buffer Management Scheme)。首先,VBBMS将RAM分成随机请求处理区和连续请求处理区,分别用来处理随机请求和连续请求;其次,VBBMS采用虚拟块技术,尽可能存储访问频率高的数据,并且对随机请求进行重构,将随机的、小的请求变成顺序的、大的连续请求发送给SDFTL,以减少闪存的读写次数和优化垃圾回收的效率;最后,连续请求处理区通过预取数据,利用请求的空间局部性,增加了缓冲区的命中率,进一步了提升系统的整体性能。实验结果显示,平均而言,VBBMS相比BPLRU算法,缓冲区命中率提高20.92%,响应时间减少23.93%,块擦除次数减少13.38%;相比CFLRU算法,缓冲区命中率提高29.33%,响应时间减少28.09%,块擦除次数减少48.77%;相比页级LRU算法,缓冲区命中率提高44.16%,响应时间减少33.70%,块擦除次数减少55.75%。在闪存转换层算法设计中,本文提出一种基于分类处理的聚簇页级闪存转换层算法——CPFTL(Clustered Page-level Flash Translation Layer)。首先,CPFTL将地址映射缓存分为热映射表缓存、冷映射表缓存和连续映射表缓存,分别用来缓存访问频繁的请求的映射项、访问不频繁的请求的映射项和高空间本地性的请求的映射项,有效提升了各类请求的处理能力。其次,为利用连续请求的空间本地性,CPFTL的连续映射表缓存预取多个连续的映射项,提高它对连续请求的响应性能。最后,为减少页级映射算法的转换页读写开销,CPFTL的冷映射表缓存采用聚簇策略,即将属于同一转换页中的映射项进行聚簇,按簇进行LRU管理,当冷映射表缓存满时,根据簇的映射项个数和LRU选取合适的簇剔除到闪存。实验结果显示,平均而言,CPFTL相比经典的DFTL算法,总体缓存命中率提高50.59%,响应时间减少24.43%,地址转换页操作次数减少82.87%,块擦除次数减少29.35%;相比最新的SDFTL算法,总体缓存命中率提升9.88%,响应时间减少8.25%,地址转换页操作次数减少50.62%,闪存块擦除次数减少9.26%。
[Abstract]:In the last half century, with the development of computer architecture technology and chip processing technology, the gap between CPU performance and IO performance of computer system is widening. The bottleneck of IO performance of computer system is hard disk. Although the disk capacity has increased rapidly in recent years, due to its mechanical rotation structure and limited access speed, the hard-disk storage system has become one of the performance bottlenecks of computer systems. Compared with the traditional hard disk, the solid-state hard disk presents many excellent performances: low power consumption, fast reading and writing speed, good shock resistance, no noise, light weight and so on. Therefore, the solid state hard disk has begun to replace the traditional hard disk in many fields. However, solid-state hard disk also inherits the disadvantages of flash memory, including reading and writing asymmetry, pre-write erasure, limited erasure times and so on. In this paper, buffer management algorithm and flash memory conversion layer algorithm in solid state hard disk design are studied to reduce the number of write and erase of solid state hard disk. In the design of buffer management algorithm, this paper proposes a new buffer management algorithm for page-level FTL named VBBMS (Virtual-Block-based Buffer Management Scheme). Firstly, RAM is divided into random request processing area and continuous request processing area, which are used to process random request and continuous request respectively. Secondly, VBBMS uses virtual block technology to store data with high access frequency as much as possible, and reconstructs random request. The random, small requests are sent to SDFTL in order to reduce the number of reads and writes in flash memory and optimize the efficiency of garbage collection. Finally, the continuous request processing area utilizes the spatial locality of the request by prefetching data. The hit ratio of buffer is increased, and the overall performance of the system is further improved. The experimental results show that, on average, compared with BPLRU algorithm, the hit rate of buffer increases 20.922.The response time decreases 23.933.The number of block erasure decreases 13.38. compared with CFLRU algorithm, VBBMS improves the hit rate of buffer by 20.922a, reduces the response time by 23.933.Compared with the CFLRU algorithm, The hit rate of buffer increases 29.33, the response time decreases 28.09, the number of block erasure decreases 48.77, compared with the page-level LRU algorithm, the hit ratio of buffer increases 44.16, the response time decreases 33.70, and the number of block erasure decreases 55.75. In the design of flash memory conversion layer algorithm, this paper presents a clustering page level flash conversion layer algorithm based on classification processing: CPFTL (Clustered Page-level Flash Translation Layer).) First of all, CPFTL divides the address mapping cache into hot map cache, cold map table cache and continuous mapping table cache, which are used to cache the mapping items that access frequent requests, respectively. To access the mapping items of infrequent requests and high spatial local requests, the processing ability of all kinds of requests is improved effectively. Secondly, in order to use the continuous mapping table of CPFTL to cache multiple consecutive mapping items, the response performance of CPFTL to continuous requests is improved. Finally, in order to reduce the conversion page reading and writing overhead of page-level mapping algorithm, the cold mapping table cache of CPFTL adopts clustering strategy, that is, the mapping items belonging to the same conversion page are clustered, and LRU is managed by cluster. When the cold mapping table is full, Select suitable cluster to flash memory according to the number of mapping items and LRU. The experimental results show that, on average, compared with the classical DFTL algorithm, the total cache hit ratio is increased by 50.59, the response time is reduced by 24.43, the number of operations on the address conversion page is reduced by 82.87, the number of block erasures is reduced by 29.35, and compared with the latest SDFTL algorithm, The total hit rate of cache increases 9.88, the response time decreases 8.25, the number of operations of address conversion page reduces 50.62and the number of flash block erasures decreases 9.26.
【学位授予单位】：杭州电子科技大学
【学位级别】：硕士
【学位授予年份】：2016
【分类号】：TP333

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