当前位置:主页 > 科技论文 > 计算机论文 >

基于1553B通信协议的总线模块设计与实现

发布时间:2018-08-19 17:08
【摘要】:航空设备系统之间的通信十分复杂和多样,且需要不同的硬件接口来满足不同的航空设备,随着作战信息数据总量的增加,和数字技术的进步,为了简化这一状况,就提出了数据总线,以减少系统的布线重量,大大提高系统的可靠性。 MIL-STD-1553B总线是美国定义的一种军用串行总线标准,其中的技术要求有:规定了数字式时分制指令"响应型多路传输数据总线以及接口电子设备,,而且规定了多路传输数据总线的工作原理和总线上的信息流及要采用的电气和功能格式。数据传输方式是屏蔽双绞线方式,信号传输形式是串行数字脉冲的方式,数据代码形式为双相曼彻斯特码。 本文由具体工程项目入手,设计了一款基于MIL-STD-1553B通信协议的总线模块,对协议处理器芯片和收发器芯片分别作了深入研究。协议处理器芯片中总线控制器、远程终端和总线监视器是典型的数字集成电路,收发器则采用数模混合电路来实现。文章开始介绍了MIL-STD-1553B总线协议的主要内容,集中讨论了总线特性、硬件设备和协议。这些内容对1553B总线模块的各个参数提供了设计标准,直接决定了总线模块设计所要达到的各项指标。然后,分别对总线协议处理器和总线收发器进行了设计,描述了电路总体结构,明确了电路所起到的作用,主要对收发器部分包括发送器、接收器、基准电路、控制电路等进行详细设计。最后利用Cadence,Hsim和Hspice对电路进行了仿真验证,并给出各电路的仿真波形与1553B模块的总体仿真结果。仿真结果表明,所设计的1553B总线模块达到了协议的功能和可靠性要求。
[Abstract]:The communication between aeronautical equipment systems is very complex and diverse, and different hardware interfaces are needed to satisfy different aviation equipments. With the increase of the total amount of battle information data and the progress of digital technology, to simplify this situation, A data bus is proposed to reduce the weight of the system wiring and greatly improve the reliability of the system. MIL-STD-1553B bus is a military serial bus standard defined by the United States. The technical requirements are as follows: the digital time division instruction "responsive multiplexing data bus and interface electronic equipment" are stipulated. The working principle of the multiplex data bus, the information flow on the bus and the electric and functional format to be adopted are also specified. Data transmission mode is shielded twisted-pair wire, signal transmission mode is serial digital pulse mode, data code form is dual-phase Manchester code. In this paper, a bus module based on MIL-STD-1553B communication protocol is designed, and the protocol processor chip and transceiver chip are studied in detail. The bus controller, remote terminal and bus monitor are typical digital integrated circuits in protocol processor chip, and the transceiver is realized by mixed digital-analog circuit. In this paper, the main contents of MIL-STD-1553B bus protocol are introduced, and the bus characteristics, hardware devices and protocols are discussed. These contents provide the design standard for each parameter of the 1553B bus module and directly determine the various indexes to be achieved in the design of the bus module. Then, the bus protocol processor and bus transceiver are designed, the overall structure of the circuit is described, and the function of the circuit is clarified. The transceiver includes transmitter, receiver and reference circuit. The control circuit is designed in detail. Finally, the circuit is simulated by Hspice and Hsim, and the simulation waveform of each circuit and the overall simulation results of 1553B module are given. Simulation results show that the designed 1553B bus module meets the function and reliability requirements of the protocol.
【学位授予单位】:西安电子科技大学
【学位级别】:硕士
【学位授予年份】:2013
【分类号】:TP336

【参考文献】

相关期刊论文 前2条

1 孙涛;张华春;;基于MIL-STD-1553B协议的远程终端的FPGA实现[J];电子器件;2010年03期

2 张飞;王焕玉;徐玉朋;曹学蕾;程泽浩;梁晓华;;基于FPGA控制实现的1553B总线通讯设计[J];航天控制;2010年06期

相关硕士学位论文 前2条

1 杨煜;一种总线收发器的设计与研究[D];江南大学;2011年

2 徐丽清;1553B总线接口技术研究及FPGA实现[D];西北工业大学;2006年



本文编号:2192290

资料下载
论文发表

本文链接:https://www.wllwen.com/kejilunwen/jisuanjikexuelunwen/2192290.html


Copyright(c)文论论文网All Rights Reserved | 网站地图 |

版权申明:资料由用户e28e8***提供,本站仅收录摘要或目录,作者需要删除请E-mail邮箱bigeng88@qq.com