高精度高性能浮点除法、开方单元的研究与设计
发布时间：2018-09-04 09:48
【摘要】：随着集成电路技术的快速发展,芯片集成的密度越来越高,微处理器的浮点运算能力已成为继频率后评价CPU性能的又一重要指标。在设计中通常使用专用部件来做浮点运算,即浮点运算单元(FPU),已逐渐成为现代处理器设计中的必不可少的组成部分。国内外市场上的各种通用处理器几乎都集成有浮点运算单元,但处理精度大多只包括32位单精度和64位双精度,精度并不能满足在高精度计算、图形加速、数字信号处理等领域的应用。除法和开方是浮点基本运算中比较复杂的运算,在设计中通常采用迭代乘的方法实现,而查找表和乘法器宽度会对浮点运算性能有较大的影响。因此,设计高精度高性能的浮点除法、开方单元具有重要的理论价值和实用意义。 本文首先对Intel及AMD等浮点协处理器和浮点格式进行了分析,详细研究了IEEE-754标准中规定的浮点格式,分析了浮点除法、开方运算依赖的数学原理及公式,并深入研究了基于牛顿迭代的Goldschmidt算法。对影响浮点运算性能的查找表设计和迭代乘法器宽度做了深入探讨,经过分析研究本文设计采用多表相加的倒数表构造方法和75×75乘法器。之后,详细描述了除法／开方运算单元的整体设计和实现细节。经验证,本文所设计的除法／开方单元可完成高精度的除法和开方运算,且运算周期较短,同时支持32位单精度、64位双精度和80位扩展精度三种不同的浮点格式。最后,设计的运算单元采用ASIC全定制的电路设计方法,并使用SMIC0.13微米的工艺库进行了综合仿真验证,其工作主频和性能均达到了设计要求,已流片并应用于某领域。
[Abstract]:With the rapid development of integrated circuit technology, the density of chip integration becomes higher and higher. The floating-point computing ability of microprocessor has become another important index to evaluate the performance of CPU after frequency. In design, special components are usually used to do floating-point operation, that is, floating-point operation unit (FPU),) has gradually become an indispensable part in modern processor design. Almost all kinds of universal processors at home and abroad integrate floating-point operation units, but the processing accuracy includes only 32-bit single precision and 64-bit double-precision, so the precision can not be satisfied in high-precision calculation and graphics acceleration. The application of digital signal processing and other fields. Division and square are complex operations in the basic operation of floating-point. Iterative multiplication is usually used in the design, and the width of lookup table and multiplier has great influence on the performance of floating-point operation. Therefore, it is of great theoretical value and practical significance to design floating-point division with high precision and high performance. In this paper, the floating-point coprocessor and floating-point format such as Intel and AMD are analyzed, the floating-point format specified in IEEE-754 standard is studied in detail, and the mathematical principle and formula of floating-point division and square dependence are analyzed. The Goldschmidt algorithm based on Newton iteration is studied in detail. The design of look-up table and the width of iterative multiplier, which affect the performance of floating-point operation, are discussed in depth. The reciprocal table construction method and 75 脳 75 multiplier are designed and analyzed in this paper. After that, the whole design and implementation of division / square operation unit are described in detail. It is proved that the division / square unit designed in this paper can accomplish high precision division and square operation, and the operation period is shorter. At the same time, it supports three different floating-point schemes with 32-bit single precision and 64-bit double-precision and 80-bit extended precision. Finally, the operation unit is designed by using the ASIC fully customized circuit design method, and the comprehensive simulation is carried out by using the SMIC0.13 micron process library. Its main frequency and performance meet the design requirements, and the flow sheet has been applied to a certain field.
【学位授予单位】：华北电力大学
【学位级别】：硕士
【学位授予年份】：2014
【分类号】：TP332
本文编号：2221726
[Abstract]:With the rapid development of integrated circuit technology, the density of chip integration becomes higher and higher. The floating-point computing ability of microprocessor has become another important index to evaluate the performance of CPU after frequency. In design, special components are usually used to do floating-point operation, that is, floating-point operation unit (FPU),) has gradually become an indispensable part in modern processor design. Almost all kinds of universal processors at home and abroad integrate floating-point operation units, but the processing accuracy includes only 32-bit single precision and 64-bit double-precision, so the precision can not be satisfied in high-precision calculation and graphics acceleration. The application of digital signal processing and other fields. Division and square are complex operations in the basic operation of floating-point. Iterative multiplication is usually used in the design, and the width of lookup table and multiplier has great influence on the performance of floating-point operation. Therefore, it is of great theoretical value and practical significance to design floating-point division with high precision and high performance. In this paper, the floating-point coprocessor and floating-point format such as Intel and AMD are analyzed, the floating-point format specified in IEEE-754 standard is studied in detail, and the mathematical principle and formula of floating-point division and square dependence are analyzed. The Goldschmidt algorithm based on Newton iteration is studied in detail. The design of look-up table and the width of iterative multiplier, which affect the performance of floating-point operation, are discussed in depth. The reciprocal table construction method and 75 脳 75 multiplier are designed and analyzed in this paper. After that, the whole design and implementation of division / square operation unit are described in detail. It is proved that the division / square unit designed in this paper can accomplish high precision division and square operation, and the operation period is shorter. At the same time, it supports three different floating-point schemes with 32-bit single precision and 64-bit double-precision and 80-bit extended precision. Finally, the operation unit is designed by using the ASIC fully customized circuit design method, and the comprehensive simulation is carried out by using the SMIC0.13 micron process library. Its main frequency and performance meet the design requirements, and the flow sheet has been applied to a certain field.
【学位授予单位】：华北电力大学
【学位级别】：硕士
【学位授予年份】：2014
【分类号】：TP332
【参考文献】
相关期刊论文 前7条
1 黄宁;朱恩;;32位高性能浮点乘法器芯片设计研究[J];电子工程师;2008年01期
2 金美华;宋万杰;吴顺君;;FPGA中浮点乘法器的实现[J];火控雷达技术;2008年01期
3 夏宏,曲英杰,王沁;求补舍入并行和位长自适应整数转浮点数电路设计[J];计算机研究与发展;2001年09期
4 周旭,唐志敏;一种快速的浮点乘法器结构[J];计算机研究与发展;2003年06期
5 夏宏,李笑盈,王攻本;浮点开方运算单元的电路设计[J];计算机工程与应用;2001年11期
6 夏宏,吴克河,李占才;浮点加法器电路设计算法的研究[J];计算机工程与应用;2001年13期
7 李蓉;于伦正;时晨;;浮点倒数查找表的构造[J];微电子学与计算机;2007年07期
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