电荷俘获型存储器阻挡层的研究

发布时间：2018-09-12 18:03

【摘要】：闪存是当前非易失性半导体存储器市场上的主流存储器件。随着闪存进入20纳米工艺节点,基于传统浮栅结构的闪存技术正面临严重的技术挑战,如浮栅耦合、电荷泄漏、相邻单元之间的串扰问题等。因而,提出了能够解决以上问题的电荷分立俘获型存储器。这种电荷俘获存储器件的基本结构是由隧穿层、存储层和阻挡层等功能层构成。本论文主要针对当前电荷俘获存储器可持续性缩小过程中的低压和高可靠性的需求,对阻挡层的材料、结构、后处理方式进行了优化,以及提出了光照的方法更准确的测试电容结构中少子参与的速度特性。本论文首先介绍了如何优化阻挡层材料。由于采用传统的SiO2做阻挡层材料,不能满足器件持续按比例缩小的要求,因而,提出了引入高k阻挡层。首先阐明了引入高k材料做阻挡层的原因。这就是阻挡层采用高k材料,能使电场更多的叠加在遂穿层上,从而增大器件的编程擦写速度。同时,高k阻挡层和大功函数的金属电极一起能够有效的抑制擦除饱和现象。接着,介绍了各种高k阻挡层及其相应的存储器件的性能。接着介绍了如何优化阻挡层结构。一种是采用堆叠的高k阻挡层。这样可以兼具多种高k材料的优点。另一种是在阻挡层和俘获层之间插入siO2层。由于SiO2带隙宽,那么器件可以在不损失速度的前提下,极大的改善器件的保持特性。然后提出了对阻挡层中常用的Al2O3材料进行后处理优化。我们实验中发现英高温退火能有效降低Al2O3材料的缺陷密度,从而,改善电荷俘获型存储器件的性能。同研究发现退火气氛对MANOS器件也有明显的影响。最后,研究中发现在电容结构中少子参与的速度特性测试中引入光照。并基于弛豫时间模型,提取了光照和非光照下的时间常数,光照可以有效的减小时问常数。并且,光照能够增大器件的编擦速度,使器件的速度和晶体管的速度相一致。
[Abstract]:Flash memory is the mainstream memory device in the current non-volatile semiconductor memory market. With the flash memory entering the 20nm process node, the flash memory technology based on the traditional floating gate structure is facing serious technical challenges, such as floating gate coupling, charge leakage, crosstalk between adjacent units and so on. Therefore, the charge discrete capture memory which can solve the above problems is proposed. The basic structure of this device is composed of tunneling layer, storage layer and barrier layer. In order to meet the demand of low voltage and high reliability in the process of sustainable reduction of charge capture memory, the material, structure and post-processing of the barrier layer are optimized in this paper. And the method of illumination is proposed to test the velocity characteristics of minority carrier in capacitance structure more accurately. In this paper, we first introduce how to optimize the barrier layer material. Because the traditional SiO2 is used as the barrier material, it can not meet the requirement of continuous proportional reduction of the device. Therefore, the introduction of high k barrier layer is proposed. Firstly, the reason of introducing high k material as barrier layer is explained. This is the barrier layer using a high k material, can make the electric field more superimposed on the tunneling layer, thus increasing the device programming erasure speed. At the same time, the high k barrier layer and the metal electrode with large work function can effectively suppress the erasure saturation phenomenon. Then, the performance of various high k barrier layers and their corresponding memory devices are introduced. Then it introduces how to optimize the barrier structure. One is a stacked high k barrier layer. This can have the advantages of a variety of high k materials. The other is to insert the siO2 layer between the barrier layer and the capture layer. Because of the bandgap width of SiO2, the device can greatly improve the device retention characteristics without losing the speed. Then the post-treatment optimization of the Al2O3 materials commonly used in the barrier layer is proposed. We find that annealing at high temperature can effectively reduce the defect density of Al2O3 materials and improve the performance of charge capture memory devices. It is also found that annealing atmosphere has a significant effect on MANOS devices. Finally, it is found that light is introduced into the measurement of the speed characteristics of the minority carriers in the capacitance structure. Based on the relaxation time model, the time constants under illumination and non-illumination are extracted, and the time constant can be reduced effectively by illumination. In addition, the illumination can increase the speed of the device and make the speed of the device consistent with the speed of the transistor.
【学位授予单位】：安徽大学
【学位级别】：博士
【学位授予年份】：2012
【分类号】：TP333

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