基于OVP的多核处理器系统级建模与评估

发布时间：2018-10-08 19:21

【摘要】：随着通信和多媒体领域等应用变得越来越复杂,软件应用对于硬件的性能要求也越来越高,可编程多核处理器由于其既具备单核处理器的灵活性,又有比单核处理器更高的性能优势,成为了研究热点。另一方面,多核处理器由于其硬件设计和软件应用的开发难度都非常大,利用多核处理器的系统级模型在硬件设计前期首先对多核系统架构进行探索,并同时进行多核软件开发,这样有利于寻求最优架构,减少研发周期。针对这一情况,本文提出了一种多核处理器的系统级建模方法,并利用该建模方法构建了一个64核的多核虚拟平台,该虚拟平台可用于探索多核系统架构和开发多核软件应用。本文的主要工作如下：1.提出一种构建多核处理器模型的方法本文提出了一种多核处理器的系统级建模方法,使用OVP提供的快速处理器模型,并针对特定应用修改了单核模型,添加了一些特殊指令,OVP处理器模型由TLM2.0接口封装;利用SystemC和TLM2.0对NoC进行全定制建模,并且利用TLM2.0接口将整个系统拼接起来构成多核虚拟平台。利用OVP的仿真工具OVPsim运行多核虚拟平台,可以达到极高的仿真速度;采用TLM2.0的松散定时建模方法,用抽象数据类型表示多时钟周期的传输,进一步加快了仿真速度。2.硬件加速单元建模本文利用OVP的Semihosting机制对多核系统中的硬件加速单元进行了建模,通过函数名判断是否调用加速单元模型,在调用加速单元模型时相当于只执行一条指令,与真实的硬件加速单元表现基本一致。3.NoC建模与评估本文的多核虚拟平台对片上网络进行了全定制建模,利用SystemC和TLM2.0分别对网络接口、物理链路、路由器三个NoC组件建模,通过TLM2.0接口将各个NoC组件拼接起来构成NoC模型。本文的多核虚拟平台集成了第三方工具ORION2.0,实现了对NoC面积和功耗的评估。此外,通过跟踪FIFO的深度信号探索FIFO深度的设定。4.多核软件评估提出了利用多核虚拟平台对多核软件应用进行评估的方法。本文构建的多核虚拟平台可以仿真运行多核软件应用,其运行结果与真实的硬件仿真没有区别。本文的多核虚拟平台可以提供每个核的执行指令数,以评估多核软件应用的性能,有助于探索多核软件应用的任务划分及在多核上的映射方案。本文以LTE的下行接收链路载频同步程序为例,对软件应用的性能进行了评估。
[Abstract]:As applications such as communications and multimedia become more and more complex, software applications require higher hardware performance. Programmable multi-core processors have the flexibility of single core processors. Also has the higher performance advantage than the single-core processor, has become the research hot spot. On the other hand, the development of multi-core processor is very difficult because of its hardware design and software application, so the system level model of multi-core processor is used to explore the architecture of multi-core system in the early stage of hardware design. At the same time, multi-core software development is carried out, which is helpful to seek the optimal architecture and reduce the R & D cycle. In this paper, a system-level modeling method for multi-core processors is proposed, and a 64-core multi-core virtual platform is constructed, which can be used to explore the architecture of multi-core systems and develop multi-core software applications. The main work of this paper is as follows: 1. In this paper, a system-level modeling method of multi-core processor is presented, which uses the fast processor model provided by OVP, and modifies the single-core model for specific applications. Some special instructions are added to encapsulate the TLM2.0 processor model, SystemC and TLM2.0 are used to fully customize the NoC model, and the TLM2.0 interface is used to assemble the whole system to form a multi-core virtual platform. Using the simulation tool OVPsim of OVP to run the multi-core virtual platform, the simulation speed can be very high, and the loose timing modeling method of TLM2.0 is used to express the transmission of multi-clock cycle with abstract data type, which further speeds up the simulation speed of .2. In this paper, we use the Semihosting mechanism of OVP to model the hardware acceleration unit in the multi-core system. We use the function name to determine whether to call the acceleration unit model, which is equivalent to executing only one instruction when calling the acceleration unit model. The modeling and evaluation of the multi-core virtual platform in this paper is basically consistent with the actual performance of the hardware acceleration unit. SystemC and TLM2.0 are used to model the three NoC components of the network interface, physical link and router, respectively. Through the TLM2.0 interface, each NoC component is spliced together to form the NoC model. The multi-core virtual platform integrates the third party tool ORION2.0, to evaluate the area and power consumption of NoC. In addition, by tracking the FIFO depth signal to explore the FIFO depth setting. 4. 4. A method of multi-core software application evaluation based on multi-core virtual platform is proposed. The multi-core virtual platform constructed in this paper can simulate and run multi-core software applications, and the results are no different from the real hardware simulation. The multi-core virtual platform in this paper can provide the number of execution instructions for each core to evaluate the performance of multi-core software applications and help to explore the task partition and mapping schemes on multi-core software applications. Taking the downlink carrier frequency synchronization program of LTE as an example, the performance of software application is evaluated.
【学位授予单位】：复旦大学
【学位级别】：硕士
【学位授予年份】：2014
【分类号】：TP332

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