FT-DSPx RapidIO接口AMBA-SRIO桥的设计与实现
发布时间：2018-11-06 13:19
【摘要】：随着超大规模集成电路的迅猛发展，数字信号处理器性能不断提高，当前更是向着多核方向不断发展，但总线传输性能的增长却远远落后，系统互连传输能力成为嵌入式系统性能提升的瓶颈。在技术和市场的推动下，国际标准组织（ISO）和国际电工委员会（IEC）在2003年10月推出了专门针对嵌入式系统互连的国际标准——RapidIO(Rapid Input Output Interface)。RapidIO互连规范面向背板、片间互连通信，因具有较低的功耗和硬件成本优势，使其成为嵌入式互连的最佳选择。 国防科技大学计算机学院微电子所研制的高性能数字信号处理器FT-DSPx是一款多核处理器。FT-DSPx集成了支持RapidIO1.3协议规范的两个串行RapidIO（SRIO）模块用于芯片间互连通信，使用ARM公司的片上总线协议AMBA3.0AXI接口把SRIO和DSP内核进行连接。为了满足FT-DSPx的互连需求，本文设计了RapidIO协议和AXI协议转换的桥接部件AMBA-SRIO桥。本文主要工作包括： 1.本文首先系统研究了RapidIO1.3协议规范，分析了RapidIO互连协议架构，对RapidIO逻辑层、传输层、物理层分别进行了研究分析。在分析FT-DSPx系统互连需求的基础上，给出了SRIO的整体设计方案。 2.由于DSP内部使用AMBA3.0AXI接口把SRIO和DSP内核进行连接，因此在系统研究AMBA3.0总线协议规范的基础上，设计了用于AXI协议和RapidIO协议转换的AMBA-SRIO桥。借鉴GRIO ULI Interface，本文给出AMBA-SRIO桥与SRIO协议层模块间的接口信号，包括输入通道信号和输出通道信号，完成了AMBA-SRIO桥与AXI接口信号和SRIO协议层信号的对接。 3.对AMBA-SRIO桥的功能模块，包括控制和状态寄存器配置、地址和事务映射逻辑、打包解包模块和异步对接模块进行了详细设计与实现。重点对地址和事务映射机制、打包解包过程和利用格雷码异步FIFO实现异步对接进行设计阐述。 4.对本文设计的AMBA-SRIO桥进行模块级、部件级和芯片级验证，重点对芯片级验证进行了阐述，给出了验证结果并予以分析。结果表明，集成AMBA-SRIO桥的SRIO能够满足协议规范定义的I/O逻辑操作和门铃事务，并可以支持DMA操作，进一步验证了本文所设计的AMBA-SRIO桥接部件可以满足FT-DSPx互连需求。最后给出了逻辑综合结果，，基于Synopsys公司65nm标准单元库，设定温度为25℃，工作电压1.2V条件下，面积为109.4051μm2，功耗为10.1024mw。
[Abstract]:With the rapid development of VLSI, the performance of digital signal processor (DSP) has been improved, especially towards multi-core, but the increase of bus transmission performance lags far behind. The transmission ability of system interconnection becomes the bottleneck of embedded system performance improvement. Driven by technology and market, the International Standards Organization (ISO) and the International Electrotechnical Commission (IEC) introduced the international standard for embedded system interconnection, RapidIO (Rapid Input Output Interface). RapidIO Interconnection Specification for backplane, in October 2003. Due to the advantages of low power consumption and hardware cost, inter-chip communication is the best choice for embedded interconnection. FT-DSPx, a high-performance digital signal processor developed by Microelectronics Institute of National University of Science and Technology, is a multi-core processor. FT-DSPx integrates two serial RapidIO (SRIO) modules supporting the specification of RapidIO1.3 protocol for inter-chip interconnection and communication. The SRIO and DSP kernel are connected by the AMBA3.0AXI interface of ARM's on-chip bus protocol. In order to meet the needs of FT-DSPx interconnection, this paper designs a bridge component AMBA-SRIO bridge for the conversion of RapidIO protocol and AXI protocol. The main work of this paper includes: 1. In this paper, the specification of RapidIO1.3 protocol is studied systematically, and the architecture of RapidIO interconnection protocol is analyzed. The logical layer, transport layer and physical layer of RapidIO are studied and analyzed respectively. Based on the analysis of FT-DSPx system interconnection requirements, the overall design scheme of SRIO is presented. 2. Because SRIO and DSP kernel are connected by AMBA3.0AXI interface in DSP, a AMBA-SRIO bridge for AXI and RapidIO protocol conversion is designed based on the systematic study of AMBA3.0 bus protocol specification. The interface signal between the AMBA-SRIO bridge and the SRIO protocol layer module, including the input channel signal and the output channel signal, is given for reference to GRIO ULI Interface,. The interface signal between the AMBA-SRIO bridge and the AXI and the SRIO protocol layer signal are completed. 3. The function modules of AMBA-SRIO bridge, including control and status register configuration, address and transaction mapping logic, package unpacking module and asynchronous docking module, are designed and implemented in detail. The design of address and transaction mapping mechanism, package and unpack process and asynchronous docking using Graycode asynchronous FIFO are emphasized. 4. The AMBA-SRIO bridge designed in this paper is verified at the module level, component level and chip level. The verification of the chip level is emphasized, and the verification results are given and analyzed. The results show that the SRIO integrated with the AMBA-SRIO bridge can satisfy the I / O logic operation and doorbell transaction defined by the protocol specification, and can support the DMA operation. It is further verified that the AMBA-SRIO bridging component designed in this paper can meet the requirements of FT-DSPx interconnection. Finally, the result of logic synthesis is given. Based on the 65nm standard cell library of Synopsys Company, the area is 109.4051 渭 m ~ 2 and the power consumption is 10.1024 mwunder the condition of setting temperature 25 鈩
本文编号：2314393
[Abstract]:With the rapid development of VLSI, the performance of digital signal processor (DSP) has been improved, especially towards multi-core, but the increase of bus transmission performance lags far behind. The transmission ability of system interconnection becomes the bottleneck of embedded system performance improvement. Driven by technology and market, the International Standards Organization (ISO) and the International Electrotechnical Commission (IEC) introduced the international standard for embedded system interconnection, RapidIO (Rapid Input Output Interface). RapidIO Interconnection Specification for backplane, in October 2003. Due to the advantages of low power consumption and hardware cost, inter-chip communication is the best choice for embedded interconnection. FT-DSPx, a high-performance digital signal processor developed by Microelectronics Institute of National University of Science and Technology, is a multi-core processor. FT-DSPx integrates two serial RapidIO (SRIO) modules supporting the specification of RapidIO1.3 protocol for inter-chip interconnection and communication. The SRIO and DSP kernel are connected by the AMBA3.0AXI interface of ARM's on-chip bus protocol. In order to meet the needs of FT-DSPx interconnection, this paper designs a bridge component AMBA-SRIO bridge for the conversion of RapidIO protocol and AXI protocol. The main work of this paper includes: 1. In this paper, the specification of RapidIO1.3 protocol is studied systematically, and the architecture of RapidIO interconnection protocol is analyzed. The logical layer, transport layer and physical layer of RapidIO are studied and analyzed respectively. Based on the analysis of FT-DSPx system interconnection requirements, the overall design scheme of SRIO is presented. 2. Because SRIO and DSP kernel are connected by AMBA3.0AXI interface in DSP, a AMBA-SRIO bridge for AXI and RapidIO protocol conversion is designed based on the systematic study of AMBA3.0 bus protocol specification. The interface signal between the AMBA-SRIO bridge and the SRIO protocol layer module, including the input channel signal and the output channel signal, is given for reference to GRIO ULI Interface,. The interface signal between the AMBA-SRIO bridge and the AXI and the SRIO protocol layer signal are completed. 3. The function modules of AMBA-SRIO bridge, including control and status register configuration, address and transaction mapping logic, package unpacking module and asynchronous docking module, are designed and implemented in detail. The design of address and transaction mapping mechanism, package and unpack process and asynchronous docking using Graycode asynchronous FIFO are emphasized. 4. The AMBA-SRIO bridge designed in this paper is verified at the module level, component level and chip level. The verification of the chip level is emphasized, and the verification results are given and analyzed. The results show that the SRIO integrated with the AMBA-SRIO bridge can satisfy the I / O logic operation and doorbell transaction defined by the protocol specification, and can support the DMA operation. It is further verified that the AMBA-SRIO bridging component designed in this paper can meet the requirements of FT-DSPx interconnection. Finally, the result of logic synthesis is given. Based on the 65nm standard cell library of Synopsys Company, the area is 109.4051 渭 m ~ 2 and the power consumption is 10.1024 mwunder the condition of setting temperature 25 鈩
本文编号：2314393
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