便携式异步环回测试仪的实现
发布时间：2018-11-17 09:13
【摘要】：随着数据通信技术与网络技术的发展,数据信息网分布越来越广泛。网络数据通信有其特有的复杂性。网络中的每条通信链路都同时通过多种通信设备,一旦发生故障,很难分清故障发生点。需要专业检测人员逐个通过软件进行现场排查,才能确定整个链路中的哪些设备出现问题。这种排查方法造成了检测人员工作量大,重复性工作多等问题,而且测试工作效率低,对维护人员的技术要求高,不能正确诊断故障原因并进行误码分析。误码测试仪能很好的协助解决上述问题。 市面上的误码仪功能齐全,但普遍体积偏大,使用不方便且价格昂贵。本文设计和实现了一种基于嵌入式Linux系统的便携式低速异步环回误码测试仪。本设计采用三星公司的S3C2440芯片作为主控制器,协同DS2172专用误码芯片、SP505串行接口芯片、LXT360E1接口芯片及Cyclonell FPGA可编程逻辑器件共同完成误码仪功能,并通过Linux命令行进行结果显示及人机交互。 本误码测试仪可以完成一般误码测试、HDLC误码测试、E1误码测试以及专用的业务仿真误码测试。误码测试最高速率可达到2Mbps,提供多种伪随机码和人工码。本文详细介绍了具体的软硬件设计,包括嵌入式Linux底层驱动的开发、逻辑接口功能设计、误码比对模块设计、用户界面实现以及测试结果管理,并对设计结果进行了系统验证,表明该误码仪可以完成误码测试,满足系统数据传输中常见故障检测需求。
[Abstract]:With the development of data communication technology and network technology, data information network is more and more widely distributed. Network data communication has its unique complexity. Each communication link in the network passes through a variety of communication devices at the same time. Once a fault occurs, it is difficult to distinguish the fault point. In order to determine which equipment is wrong in the whole link, it is necessary for the professional examiner to carry out the spot check one by one through the software. This method causes many problems such as heavy workload and repetitive work, low efficiency of test work, high technical requirements for maintainers, unable to correctly diagnose the causes of faults and carry out error code analysis. Error code tester can help solve the above problems. The BER on the market has a complete range of functions, but it is generally large, inconvenient and expensive to use. A portable low speed asynchronous loop error tester based on embedded Linux system is designed and implemented in this paper. In this design, the S3C2440 chip of Samsung Company is used as the main controller, and the function of the error-meter is completed in cooperation with the DS2172 special error-code chip, the SP505 serial interface chip, the LXT360E1 interface chip and the Cyclonell FPGA programmable logic device. And through the Linux command line to display the results and man-machine interaction. The BER tester can complete general error test, HDLC error test, E1 error test and special service simulation error code test. The maximum rate of error test can reach 2 Mbps. it provides a variety of pseudorandom codes and manual codes. This paper introduces the design of hardware and software in detail, including the development of embedded Linux bottom driver, the function design of logic interface, the design of BER module, the realization of user interface and the management of test results. The result shows that the error detector can complete the error test and meet the common fault detection requirements in the system data transmission.
【学位授予单位】：北京交通大学
【学位级别】：硕士
【学位授予年份】：2012
【分类号】：TN402;TP368.1
本文编号：2337257
[Abstract]:With the development of data communication technology and network technology, data information network is more and more widely distributed. Network data communication has its unique complexity. Each communication link in the network passes through a variety of communication devices at the same time. Once a fault occurs, it is difficult to distinguish the fault point. In order to determine which equipment is wrong in the whole link, it is necessary for the professional examiner to carry out the spot check one by one through the software. This method causes many problems such as heavy workload and repetitive work, low efficiency of test work, high technical requirements for maintainers, unable to correctly diagnose the causes of faults and carry out error code analysis. Error code tester can help solve the above problems. The BER on the market has a complete range of functions, but it is generally large, inconvenient and expensive to use. A portable low speed asynchronous loop error tester based on embedded Linux system is designed and implemented in this paper. In this design, the S3C2440 chip of Samsung Company is used as the main controller, and the function of the error-meter is completed in cooperation with the DS2172 special error-code chip, the SP505 serial interface chip, the LXT360E1 interface chip and the Cyclonell FPGA programmable logic device. And through the Linux command line to display the results and man-machine interaction. The BER tester can complete general error test, HDLC error test, E1 error test and special service simulation error code test. The maximum rate of error test can reach 2 Mbps. it provides a variety of pseudorandom codes and manual codes. This paper introduces the design of hardware and software in detail, including the development of embedded Linux bottom driver, the function design of logic interface, the design of BER module, the realization of user interface and the management of test results. The result shows that the error detector can complete the error test and meet the common fault detection requirements in the system data transmission.
【学位授予单位】：北京交通大学
【学位级别】：硕士
【学位授予年份】：2012
【分类号】：TN402;TP368.1
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