SOC系统中闪存控制器的设计与验证
发布时间：2018-11-20 19:46
【摘要】：目前，智能手机市场争夺已趋白热化，也促进手机性能的日益丰富、强大和不断翻新，并因此改变了全民的通信生活。手机中的多媒体功能对高性价比的RAM，ROM和DSP等有很大的依赖，，其中ROM，工程师通常选用NANDflash，因其具有非易失、抗震、大容量和低成本的特点，并且NAND flash已经形成了成熟的产业规模。本文基于某公司一款新型手机基带芯片项目，基于SOC的IP集成设计思想，介绍其SOC系统中闪存控制器的设计与验证。 论文首先介绍了NAND flash的结构、功能和特性，应尽量理解闪存的配置资源以开发高质量的控制器。因此论文以市场中比较典型的一款三星和一款美光闪存芯片为主尽可能详细的分析了其结构，原理及内部资源配置，以及介绍了新的ONFI闪存标准。 控制器以AHB和AXI为SOC总线接口，可以以从设备的身份受处理器控制，也可以主设备的身份与片上网络相连进行数据交互。同时，设计的控制器闪存芯片接口能很好的与闪存芯片协议匹配，进行高效的传输。高的性能源于其内部设计有非常丰富的寄存器及逻辑处理模块。控制器能识别新型ONFI协议闪存器件。对控制器完成模块级验证后，进行合理的顶层包封然后连入SOC系统。 随后介绍了关于控制器的系统级功能验证方法，基于项目设计规范定义了验证功能点，然后根据实际应用情况，搭建了包含多种规格闪存虚拟模型的验证平台。采用定向激励验证的方法，对各个功能验证点进行了验证，最终达到对所有功能点的验证。本文设计验证的闪存控制器兼容性强，市场应用广。
[Abstract]:At present, the competition for the smartphone market has become more and more intense, and has promoted the increasingly rich, powerful and constantly renovated mobile phone performance, which has changed the communication life of the whole people. The multimedia function in the mobile phone depends heavily on the high performance-price ratio of RAM,ROM and DSP, among which ROM, engineers usually choose NANDflash, because of its non-volatile, aseismic, large capacity and low cost characteristics. And NAND flash has formed a mature industrial scale. This paper introduces the design and verification of flash memory controller in SOC system based on a new type of mobile phone baseband chip project and IP integrated design idea based on SOC. Firstly, this paper introduces the structure, function and characteristic of NAND flash. We should understand the configuration resource of flash memory to develop high quality controller. Therefore, this paper mainly analyzes the structure, principle and internal resource allocation of a typical Samsung and Micron flash chips in the market, and introduces a new ONFI flash memory standard. The controller uses AHB and AXI as the SOC bus interface, which can be controlled by the processor as the slave device, or the main device can be connected to the on-chip network for data exchange. At the same time, the controller flash chip interface can match the flash chip protocol and transmit efficiently. High performance comes from its rich internal design of registers and logic processing modules. The controller can identify a new ONFI protocol flash device. After the module level verification of the controller is completed, the top layer is encapsulated reasonably and then connected to the SOC system. Then the system level function verification method of the controller is introduced. The verification function points are defined based on the project design specification, and then, according to the actual application, a verification platform including a variety of virtual models of flash memory is built. The method of directional excitation verification is used to verify each function verification point, and finally all function points are verified. The flash controller designed and verified in this paper has strong compatibility and wide market application.
【学位授予单位】：西安电子科技大学
【学位级别】：硕士
【学位授予年份】：2013
【分类号】：TP332;TN47
本文编号：2345817
[Abstract]:At present, the competition for the smartphone market has become more and more intense, and has promoted the increasingly rich, powerful and constantly renovated mobile phone performance, which has changed the communication life of the whole people. The multimedia function in the mobile phone depends heavily on the high performance-price ratio of RAM,ROM and DSP, among which ROM, engineers usually choose NANDflash, because of its non-volatile, aseismic, large capacity and low cost characteristics. And NAND flash has formed a mature industrial scale. This paper introduces the design and verification of flash memory controller in SOC system based on a new type of mobile phone baseband chip project and IP integrated design idea based on SOC. Firstly, this paper introduces the structure, function and characteristic of NAND flash. We should understand the configuration resource of flash memory to develop high quality controller. Therefore, this paper mainly analyzes the structure, principle and internal resource allocation of a typical Samsung and Micron flash chips in the market, and introduces a new ONFI flash memory standard. The controller uses AHB and AXI as the SOC bus interface, which can be controlled by the processor as the slave device, or the main device can be connected to the on-chip network for data exchange. At the same time, the controller flash chip interface can match the flash chip protocol and transmit efficiently. High performance comes from its rich internal design of registers and logic processing modules. The controller can identify a new ONFI protocol flash device. After the module level verification of the controller is completed, the top layer is encapsulated reasonably and then connected to the SOC system. Then the system level function verification method of the controller is introduced. The verification function points are defined based on the project design specification, and then, according to the actual application, a verification platform including a variety of virtual models of flash memory is built. The method of directional excitation verification is used to verify each function verification point, and finally all function points are verified. The flash controller designed and verified in this paper has strong compatibility and wide market application.
【学位授予单位】：西安电子科技大学
【学位级别】：硕士
【学位授予年份】：2013
【分类号】：TP332;TN47
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本文编号：2345817
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