多核处理器事务级模型多视图协同验证环境

发布时间：2018-12-07 19:13

【摘要】：随着集成电路工艺持续高速发展,片上处理器核数目呈现指数增长规律,设计复杂程度不断增长,对处理器验证提出了严峻的挑战,至今仍缺乏有效的工具手段。提出了一种多核处理器事务级模型的多视图协同验证方法,将模拟验证、形式验证、应用验证三种不同验证视图,采用统一平台集成为一体化验证环境。从而可在一体化验证环境中,充分发挥多种验证方法综合应用的优势,协同高效完成多核处理器事务级模型验证任务。基于SoCLib事务级建模仿真平台实现了一个具有良好可扩展性的多视图协同验证环境MVIE。初步应用实验结果表明,多视图协同验证和传统单一视图验证方法相比,在模型验证的方便性、完备性、高效性以及模型数据一致性维护等方面,具有明显的优势。
[Abstract]:With the continuous rapid development of integrated circuit (IC) technology, the number of on-chip processor cores is increasing exponentially, and the design complexity is increasing, which poses a severe challenge to processor verification, and still lacks effective tools. In this paper, a multi-view co-verification method for multi-core processor transaction level model is proposed. Three different verification views, simulation verification, formal verification and application verification, are integrated into an integrated verification environment using a unified platform. Therefore, in the integrated verification environment, we can give full play to the advantages of the integrated application of multiple verification methods, and accomplish the task of multi-core processor transaction level model verification in cooperation and efficiency. Based on SoCLib transaction level modeling and simulation platform, a multi-view collaborative verification environment MVIE. with good scalability is implemented. The experimental results show that compared with the traditional single view verification method, multi-view collaborative verification has obvious advantages in the aspects of convenience, completeness, efficiency and consistency maintenance of model data.
【作者单位】：国防科学技术大学高性能计算国家重点实验室;
【基金】：国家自然科学基金资助项目(61133007)
【分类号】：TP332

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